SU1807984A3 - Device for determination of transit-though-zero moment - Google Patents

Description

The invention relates to the field of signal conversion and can be used as a device for determining the moment of zero crossing of an alternating voltage. The device can also be used to determine the moment of zero crossing of the difference of two input signals.

The purpose of the invention is to increase the noise immunity of the device while maintaining accuracy.

A block diagram of the proposed device is shown in Fig. 1; in fig. 2 shows oscillograms of the voltage at various points of the device, where 1 is the device input, 2 is a comparator with hysteresis, 3 is a comparator without hysteresis (zero-organ). 4 - Dtrigger, 5 - input signal (Fig. 2) with (54) DEVICE FOR DETERMINING THE MOMENT OF TRANSITION THROUGH ZERO (57) Use: signal conversion area, as a device for determining the moment of crossing the zero of an alternating voltage, to determine the moment of crossing zero difference between the two input signals. The aim of the invention is to improve noise immunity while maintaining accuracy. Essence: the device contains a comparator without hysteresis, a comparator with hysteresis and a D-flip-flop. 2 ill.

exaggerated noise level, b - output signal of comparator 2 with hysteresis, 7 - output signal of comparator 3 without hysteresis, 8 - output signal taken from the output Q of the D-flip-flop.

Input 1 of the device is connected to the inputs of comparators 2 and 3. The output of comparator 2 with hysteresis is connected to the input R of reset of the D flip-flop, and the output of comparator 3 without hysteresis is connected to the input C of synchronization of the D-flip-flop. Input D of the D-flip-flop is connected to bus 1, corresponding to logic G. The output of the device is the output Q D of the trigger.

The device works as follows.

With a large negative value of the input signal 5 at the outputs of comparators 2 and 3 (Fig. 1) negative voltage,

SU <, n 1807984 АЗ which corresponds to logical 0 (pos. 6 and 7 in Fig. 2). In this case, the inputs R and C of the D-flip-flop 4 are logical "0", and the trigger itself is in the initial (zero) state and at its output Q is also logical 0 (item 8 in Fig. 2).

At the first transition through zero of the input signal at time ti, comparator 3, without hysteresis, forms an output voltage drop corresponding to logical 1, according to which a unit is written to D-flip-flop 4 at input C, The subsequent bounce of the output signal of comparator 2 due to interference does not change the state D -trigger.

At time ts, comparator 2 with hysteresis is triggered, the output of which goes to the input R of D-flip-flop 4 and resets it. As a result, at the output Q of the D-flip-flop 4, signal 8 is generated, the leading edge of which coincides with the moment of the first transition of the input signal 5 through zero (and in the absence of interference, exactly at the moment the input signal crosses zero), and the trailing edge coincides with the moment of the comparator operation 2 with hysteresis.

A further change in the input signal 5 at the time tz leads to the release of the comparator 3 without hysteresis and causes its subsequent operation at the time t4 due to interference. In this case, the change in the state of the D-flip-flop 4 does not occur, since at its input R at this time there is a reset signal that holds this trigger in its original state. This ensures the device's noise immunity under the conditions of the value, releases the comparator 2 with a hysteresis, subsequently providing the transition of the D-flip-flop 4 to the unit state at time ΐ6.

To compare two signals, it is sufficient for the second inputs of the comparators connected to the common bus in FIG. 1, apply a second input signal.

Thus, in comparison with the known device, the proposed one has a very high noise immunity, forming only one pulse per one period of alternating voltage, even in conditions of intense interference. Moreover, the leading edge of this pulse exactly coincides with the moment when the input signal crosses zero in the absence of interference.

As for the comparator with hysteresis and the D-flip-flop, they are known, but when introduced into the proposed device in combination with new connections, they increase the noise immunity of the device.

Thus, the proposal has industrial utility and significant novelty.

Claims (1)

Claim A device for determining the moment of crossing zero, containing a zero-organ in the form of a comparator without hysteresis, characterized in that it additionally contains a D-flip-flop and a comparator with hysteresis, the input of which is connected to the input of the comparator without hysteresis, 35 and the output of the comparator with hysteresis is connected with input R of D-flip-flop reset, and comparator output without hysteresis