SU1689951A1 - Device for servicing requests - Google Patents

Abstract

The invention relates to computing and can be used in devices for interrupting programs and as part of control systems to provide individual and synchronous group service to requests of various devices. The number of devices in a group and the number of groups are variable. The aim of the invention is to enhance the functionality and increase the speed. The device contains a polling block 1, a control block 5, N analysis blocks 2 (N is the number of external devices), a group of K elements OF (K is the number of device groups), multiplexer 4. The purpose of the invention is achieved by being able to set any request of any priority and parallel analysis of requests from all groups of external devices. 4 il. Yo

Description

ON 00 Yu Yu

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The invention relates to computing and can be used in devices for interrupting programs and as part of a control system for providing individual and synchronous group service to requests of various devices.

The purpose of the invention is to expand the functionality by setting any request to any priority and improving speed.

Figure 1 shows the structural diagram of the device; figure 2 - block diagram of the survey; FIG. 3 is a control block diagram; figure 4 - diagram of the analysis block.

The device for servicing requests contains a polling unit 1, L analysis units 2, an AND 3 element group, a multiplexer 4, a control unit 5, device inputs 6-11, device internal buses 12-25, device group number output 26.

The polling unit contains the shift register 27, the group of elements AND 28, the registers 29 and 30. The control unit contains the element AND 31, the group of elements AND 32, the group of elements OR 33, the group of elements AND 34, the encoder 35.

Each analysis block 2 contains a group number register 36, a comparison circuit 37, a group of comparison circuits 38, an element OR 39, a group of elements OR 40.

Block 1 poll polls groups of external devices in accordance with a given priority. Each block 2 2p analysis requests secured to its external device. It switches the request coming from the external device to the corresponding output, the address of which is determined by the group number from register 36 of the group number and the order of receipt of the group numbers to the inputs 12-15 of the poll.

The control unit 5, in accordance with the mask arriving at the input 16, makes a priority selection of one of the group requests present at the inputs 21-24 and performs its encoding.

Before starting work, it is necessary to prepare block 1 of the survey. A reset signal received at input 9, register 30 is reset. At input 6, the code of the group number is set to (the highest priority is which, by the recording signal, I enter

five

0

five

0

five

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five

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five

This input 8, through the first AND element of the element group AND 28, is written into the first cell of the register 29. At the same time, the logical unit level is entered into the first cell of the register 30. After this, the recording control signal on input 7 shifts the shift register 27 by one bit. Input 6 sets the group number code following the priority and records the second cell of the register 29 using the write signal and simultaneously writes one into the second cell register 30. Similarly, the remaining numbers of groups are recorded. If the number of group numbers is less than K, then no entries are made in the remaining cells of register 29, and zero information is found in the corresponding cells of register 30. Changing the order of loading group numbers into priority register 29, any priority can be set to any group. In register 36, in each analysis block, the number of the group in which this out-of-device device belongs is entered.

The device works as follows.

The group numbers from the priority register 29 over the buses 12-15 are fed to the inputs of the comparison circuits 37 and 38 in all the analysis blocks. The other inputs of these comparison circuits from register 36 receive the code of the group number to which the external device belongs. A zero potential appears at the output of the comparison circuit if the codes of the group numbers at its inputs have occurred. This zero potential allows the operation of one of the elements of the OR 40 group or element OR 39. A readiness signal from an external device arriving at input 11 through the selected element OR 39 and 40 passes to the corresponding bus 17-20 of the analysis unit. The signal of the logical unit at this output indicates the readiness of the external device. The outputs of the remaining elements OR 39 and 40 in each analysis block are held in one state by the signals of the logical unit from the outputs of the comparison circuits 37 and 38.

Elements And analyze signals by group i readiness. In this case, two possible situations: all external devices included in the group gave a ready signal; at least one external device did not give a signal of readiness.

In the first case, the corresponding AND element of the AND 3f-3 element group outputs the level of the logical unit, which corresponds to the group readiness, which is fed to the corresponding request input 21-24 of the control unit. In the second case, the group readiness signal is not generated.

With the help of elements AND 31, a group of elements AND 32 and OR 33, the most priority request is selected, which is received at the first input of the corresponding element AND group of elements AND 34, The third inputs of these elements use a bus 16 from register 30 to receive masks that block requests from groups whose number is not recorded in register 29.

From the output of the element AND group of elements 34, the request passes to the corresponding input of the encoder 35. The encoder 35 generates a control code that enters via bus 25 to the control input of multiplexer 4, connects it to output 26 with the code of the group number that issued the request.

Claims (1)

Invention Formula A device for servicing requests, comprising a polling unit, including a shift register and a group of elements, And a control unit, including the first element, And, and n analysis units (n is the number of external devices), each of which includes a group number register, the first comparison circuit, the element OR, in each analysis block, the output of the group number register is connected to the first input of the first comparison circuit, the first and second inputs of the analysis block are respectively the input of the number of the request group and the ready input of the external device, the first th input of a group of polling inputs of each analysis unit is connected to the first The group number of each analysis block is connected to the first input of the analysis block, characterized in that, in order to expand the functionality by setting any request of any priority and speeding up, a group of K elements I is entered into it (K is the number of external device groups) and the multiplexer, the first and second registers are entered into the polling unit, the first and second groups of elements AND, the group of elements OR, the encoder and the group of elements OR and the group of elements of comparison are entered into each control unit, with same name it outputs of all the analysis units are connected to the inputs of respective elements 0 And the group, the output of the first element And the group is connected to the first inputs of the first element And the first group, the first element OR group and with the inverse input of the first element To 5 of the control unit, the direct input of which is connected to the output of the second element AND group and the output to the first input of the second element AND of the first group and the second input of the first element OR of the group of the control unit, the output of the j-ro element AND group (, K) is connected to the first input of the 1st element I. the second group of the control unit (, K-2), the output of which is connected to the first input of the j-ro element AND of the first group of the control unit; the outputs of elements AND of the first group are connected to the corresponding inputs of the encoder, the output of which connected to the multiplexer control input, Exit which is - 0 five 0 five The output of the device group number, and the information inputs are respectively connected to the polling output group of the polling unit and the polling input group of each analysis unit, the output of the 1st element OR of the control unit group (K-3) is connected to the first input (1 + 1) - of the first element OR of group 1 by the inverse input of the 1st element AND the output of the group of outputs of the polling unit p ü: ° P of the control unit group, the second input of the (1 + 1) -th element OR of the control unit group is connected to the output of the 1st element AND of the second group of the control unit, output tX-2) - ro of the element OR of the group of the control unit is connected by 1C inverse input (K-2) of the second element of the second group of the control unit, the second inputs of the elements AND of the group of the polling unit are connected to the input of the record and to the second input of the first comparison circuit, the first, second and third inputs of the polling unit are respectively the input of the polling address setting, the current address writing control input and the device address recording input, the outputs of the shift register of the polling unit are connected to the first inputs of the corresponding elements And group, , re55 P 55 the device addresses, and the outputs are connected to the corresponding write inputs of the first and second registers, the information inputs of the first register are connected to the input of specifying the device polling address, and the outputs are a group of polling outputs of the polling unit, the information inputs of the second register are connected to the unit potential potential bus and the outputs are respectively connected to the second inputs of the elements AND of the second group of the control unit, the reset inputs of the second register of the polling h block are the reset input of the device, in each block the analysis the first inputs of OR group elements and the first input of the OR element connected to the second behind/ the input of the analysis block, the second OR elements of the group and the OR element of each analysis block are connected to the outputs of the corresponding group comparison circuits and the output of the comparison circuit, and the outputs are outputs until the analysis, the first input of the nth comparison circuit of the group of each analysis block (, K -1) connected to the (pM) th input of the group of polling inputs of the analysis unit, the second inputs of the comparison circuits of the group of each initial unit are connected to the register number of the group of the analysis unit, the shift input of the 1 register of the polling unit is connected to the control input record the current device addresses.