SU1684915A1 - Converter of random signals - Google Patents

Abstract

The invention relates to a pulse technique and can be used in information and measurement technology. The purpose of the invention is to expand the dynamic range of operation - by introducing the first and second dividers 6 and 7 into the transducer and forming new functional connections. The converter also contains a clock pulse generator 1, elements 2 and 3, a functional converter 4, a reversible counter 5, a sensor of 10 random numbers, a block 11 of comparison. 1 il.

Description

The invention relates to a pulse technique and can be used in information and measurement technology.

The aim of the invention is to expand the dynamic range of operation.

The drawing shows an electrical functional diagram of a converter of random signals.

The converter of random signals contains a clock pulse generator 1, the first output of which is connected to the first inputs of the first and second elements 2 and 3, functional converter 4, the group of inputs of which is connected to the corresponding outputs of the reversing counter 5, the first and second inputs of which are connected to the outputs of the first and the second dividers 6 and 7 frequency, respectively, the first bus 8 and the second bus 9 connected to the second input of the second element And 3, the output of which is connected to the clock input of the functional transform L 4

the output and the synchronization input of which are connected respectively to the input of the second frequency divider 7 and with the second output of the generator 1 clock pulses. The first bus 8 is connected to the second input of the first element And 2, the output of which is connected to the input of the first frequency divider 6.

The functional converter 4 comprises successively connected random number sensor 10 and a comparison unit 11, the output of which is the output of the Functional converter 4, the clock input and synchronization input of which are connected to the input of the random number sensor 10 and the input gate of the comparison block 11, respectively.

Converter random signals works as follows.

Let a random sequence of positive pulses of Hz duration be applied to bus 8, and a duration of T2i to bus 9, where & A 1,2,3 ie

About 00

.N Yu

SP

the input signals are random processes {Hz} and {Gz |}, which are stationary in a given interval of averaging.

Upon receipt of the 1st pulse Hz to the second input element And 2 to the input of the divider

6 frequencies begin to receive pulses of frequency f0 from the first output of the generator 1 clock pulses. As a result, over time Hz, a pulse sequence with a frequency of f0 / Ki is formed at the output of the frequency divider 6, where Ki is the division factor of the frequency divider 6. During the time Hz, on the first (summing) input of the reversible counter 5, on average, 2-- pulses arrive. At the moment we stop

Not the 1st pulse TCs at the second input of the element And 2 appears the potential of logical zero and the flow of pulses to the summing input of the reversible counter 5 stops.

Upon receipt of the 1st positive pulse of duration t / 21 on the bus 9, pulses of frequency f0 from the first generator output 1 of clock pulses arrive at the clock input through the element 3 of the functional converter 4, the output of the sensor 10 random numbers of which are generated by each clock pulse ( in this case, the implementation), for example, uncorrelated uniformly distributed pseudo-random binary numbers supplied to the first group of inputs of the comparison unit 11, to the second group of inputs of which from the outputs are Version counter 5 is supplied with a binary number N (1). If the number at the output of the sensor 10 random numbers is less than N (t), the potential of a logical unit appears at the output of the comparison unit 11, otherwise it is a logical zero. Since each binary combination on the first group of inputs of the comparison unit 11 is uniform, and their total number is 21, where I is the sensor size of 10 random numbers, the units at the output of the comparison unit 11 when short pulses from the second input to its gate input the clock generator 1 outputs will appear on average N (i) times out of 2, i.e. divider input

7frequency pulses will be received with an average frequency

N and

A (i) f0

0

five

0

five

Under the action of a series of sequences of pulses arriving at a frequency

-Chg- where K2 is the division ratio deli 2

frequency bodies 7, to the subtracting input of the reversible counter 5, the contents of the latter are reduced by the value of n, Г2ДШ

The change in the average value of the contents of the N (l) reversible counter 5 after the registration of the 1st pair of pulses Hz and T2i is determined from the ratio

Au ,. (,)

Upon the arrival of the next pair of pulses Hz + 1, G21 + 2, the described process will be repeated and the contents of the counter R (i + 1) will change to the value of the DC || +1, etc., with | AN | +1 | I ANi I.

In steady state, the contents of the reversible counter 5, i.e. device generated numbers are defined as

G2

 const,

N (oo) Co. K2

where ko 2

Ki

and it can be shown that the device operates stably at any values of the parameters of the input signals (for example, when

G2 FROM ABOUT TO ").

Claims (1)

Claims of a random signal converter comprising a clock pulse generator, the first output of which is connected to the first inputs of the first and second elements AND, the second inputs of which are connected respectively to the first and second input buses, a functional converter and a reversible counter, characterized in that dynamic range of operation, the first and second frequency dividers are entered into it, the outputs of which are connected respectively to the first and second inputs of the reversible counter, the outputs to which Secondly, they are connected to the group of inputs of the functional converter, the clock input, the output and the synchronization input of which are connected respectively to the output of the second element I, to the input of the second frequency divider and to the second output of the clock generator, the output of the first element I to the input of the first frequency divider.