SU1524179A1 - Voltage to time interval converter - Google Patents

Abstract

The invention relates to electrical measuring equipment and can be used in digital measuring devices for special and universal purposes. The purpose of the invention is to increase the dynamic accuracy of the converter. The latter contains the output bus 1, the integrators 2 and 7, the switch 3, the switch 4, the source 5 of the reference current, the input bus 6, the comparator 8, the analyzer 9 characters, the common bus 10, the generator 11 pulses, triggers 12 and 14, blocks 13 and 16 reset, element 15 I. 1 z.p. f-ly, 3 ill.

Description

(L

The invention relates to electrical measuring equipment and can be used in digital devices of special and universal purpose.

The purpose of the invention is to increase the dynamic accuracy of the converter.

FIG. 1 shows a functional diagram of the converter; 2, the timing diagrams of the converter operation; in fig. 3 is a switch diagram.

The converter contains output bus 1, first integrator 2, switch 3, switch 4, reference current source, input bus 6, second integrator 7, comparator 8, character analyzer 9, common bus 10, pulse generator 11, trigger 12, block 13 reset, counting trigger 14, element 15 and block 16 reset. The switch consists of a D-flip-flop 17 and a switch 18.

In the time diagrams (Fig. 2 /, the following designations are accepted: 19 is the input signal; 20 is the pulse sequence at the output of the pulse generator 11; 21 and 22 are the output signals of the integrators 2 and 7, respectively; 23 is the output signal of the trigger 12; 24 - the output signal of the analyzer 9 characters; 25 - the output signal of the switch 4; 26 - the signal at the output of the switch 3, 27 - the output signal of the counting trigger 14.

The device works as follows.

Let voltage be applied to the input and, and, const O, then at the switch 4 output an exemplary current of 1 O (i.e. Ig) At time t, a pulse arrives from the output of the pulse generator 11 and sets the trigger 12.

45

, and the counting trigger 14 - in.

In this case, the reset unit 13 is turned off. As a result, the voltage at the output of the integrator 2 linearly decreases from the zero initial value according to the law

1G Ux, .50

.H-iJ gf-i

R, C, o, is the constant of the time of the first integrator 2.

At time t, the next pulse comes from the output of the pulse generator 1I and sets the counting trigger 14 to 1. At the output of the element 15, a single level appears,

Q

j 0

five

five

five

0

then, the second reset unit 16 is turned off and the switch 3 is switched on by applying a current -1 to the first input of the integrator 2. As a result, the output voltage of the first integrator 2 linearly increases according to the law

U, n.l U, n - 1- (Y - I,) dt,

and the integrator 7 decreases linearly from the zero initial value according to the law

 And rj 5; .

where fj is the integrator time constant 7.

At time t, the output voltages of the integrators 2 and 7 turn out to be equal, which leads to the triggering of the comparator 8, and therefore the trigger 12, and to the zero level of the output voltage of the And 15 element. As a result, both the reset units 13 and 16 are set, zero initial conditions at the outputs of the integrators 2 and 7, switch 3 disconnects the current from the input of the first integrator 2.

At time t, another pulse arrives from the input of the pulse generator I1 and the cycle of operation repeats.

When changing the sign of the input voltage (for example, at time t4), the output voltage of the integrator 2 increases, starting from zero. This triggers the analyzer 9 characters (with some delay & t) and prepares the operation of switch 4. With the next pulse from the generator of 11 pulses (time tj) switch 4 is triggered by connecting to the input of switch 3 positive current + I ( j. Next, the operation proceeds as described, with the only difference that the time diagrams of the output voltages of the integrators 2 and 7 are mirrored with respect to the x-axis.

Since the initial conditions of the integrators 2 and 7 in each subsequent cycle (two periods of the generator pulses 11) do not depend on the previous one (since they are always zero), the conversion process per cycle is described by the following relation:

- -c1 I - - -c,: -.) -

t, i,

9th.

f

-kIL

1 r / l. t t 1

   . 22 I

UcJ- tt t, I

J (

-kIL

1 r / l. t t 1

1 I

From block 5

From SAMCL 3

From Ulon Yu

17

fig.Z

L ffAOHy 3

Claims (2)

Claim 1. A voltage converter in a time interval containing a first integrator, the first information input of which is an input bus and combined with the first information input of the second integrator, and the second information input is connected to the output of the switch, the first information input of which is connected to the output of the switch, the first and second the information inputs of which are connected to the corresponding outputs of the reference signal source, and the first and second control inputs - with the outputs of the pulse generator and analyzer Accordingly, the first input of which is a common bus, and the second is connected to the output of the first integrator and combined with the first input of the comparator, the second input of which is connected to the output of the second integrator, the reset input of which is connected to the output of the first reset unit, and the output of the comparator is connected to the input 1Q trigger, the input of which is connected to the output of the pulse generator, characterized in that, in order to increase the dynamic accuracy of the converter, a second, 5 reset block, an And element, and a counting trigger, the input of which is connected It is connected to the output of the pulse generator, and the output is to the first input of the And element, the second input of which is combined with the input of the reset unit and connected to the trigger output, the output of the second reset unit is connected to the reset input of the first integrator, and the output of the And element is connected to the input the first reset unit, 25 is the control input of the switch and is the output bus. 2. The converter according to π. 1, characterized in that the switch is made on a D-trigger and a switch, the first and second information inputs of which are the first and second information inputs of the switch, respectively, the output is the output of the switch, and the control input is connected to the output of the trigger, C- whose input is the second control input, and the D-input is the first control input. Fie 2 From the block, 5 To block 3 of Fig. 3