SU1679632A1 - Analog-digital conversion method and device thereof - Google Patents

Description

The invention relates to a pulse technique and, in particular, to the conversion of voltages into digital codes. The purpose of the invention is to increase the speed. For this, the converted voltage is subtracted from the reference voltage, the difference is converted into the first frequency during the first time interval, the first code is formed, it is converted into the second voltage, which is again converted into the second frequency, and then into the second code. The latter is subtracted from the quotient of the reference voltage divided by the quantum value of the second voltage. 2 sec. and 1 hp ff., 3 ill.

The invention relates to a pulse technique, in particular, to methods for converting voltages into digital codes.

The purpose of the invention is to increase speed.

The conversion process in the proposed method can be described by the following expressions. First get the difference

un = io ₇ and _x ,

where Tso ~ reference voltage, convert the voltage 11 _n to the frequency b = k11n.

The period X1 = 1 / C of this frequency is converted into a code ηι = ί ₀ / ίι using the reference frequency ₀ . The code u is converted into a voltage υι = Δη · ηι, which is converted into a frequency

ί2, uι, ηι,

ίο

G2 = Ki1. The period ί2 = 1 / ί2 of this frequency is converted to a code Π2 = ίο / ί2.

Then from the code equal to 1) ₀ / Δη, subtract the code P2. getting the final result of the conversion x ⁼ - ⁿ 2.

Substituting in PG successively and C _p get

_ 1p _ 1r _

to u to Δη ηι

That - ίι _ to and _п _ and _about - and _х _ to Δη ίρ to Δη Δι

CR _ UhΔη Δη '

P2 =

ί2

1679632 Α1

1679632

Τη (rt) - That [

therefore

Ki _t ("-1)

kayi | p / a [\ 1 _t

and is the exact result of the conversion and _x to the code with a voltage quantum Δη.

to a Tsch Νγπ

Ki _t (a-1)

= a- 1 + ·

The result of x is obtained for Τ _η = ΐι + ΐ2 = -A 4- -1_ = AkAA ² ί2 · ² '

since ί2 = Ш1 = к Δη Hz

= AC

ίο

Τ1

we have ΐιί2— to Δη ίο, from where

ίί +

Τ _η

to Δη ο ίί

_ίι_ _

to Δη ίο

to Δη ίο

If in the proposed method to have the maximum frequency when converting voltage into frequency 1 _t = Р _t and resolution 1 / Yt, then this allows determining the magnitudes of quanta both in time ΐο = -4— when receiving u and пг, and

Thats

the voltage Δη when converting u to i

From the condition of obtaining the code ui, equal to Νγπ, when converting the maximum frequency Tm = ki ©, the value To ⁼ Mtkio I To ⁼ 1 / Mtkl · is determined

To perform the conversion algorithm, the reference voltage and ₀ must be greater than _xt = and _t , i.e. 11 ₀ = “1) t. and the code 1 \ 1 _t must be obtained when converting 11t, whence the quantum

* _ Tskt _ Tst _ Tsr Νγπ Νγπ O. Νιη

Therefore, the code υ ₀ / Δη, from which pg is subtracted, is α Νγπ. Given the range of change of Tn = T _p (o) -Tp (IT) when converting

and _x = o, t1 = ki ₀ and u _x = u _t , n ⁼ k (io-it) = kit ^ -1),

as well as the values of Δη and ί ₀ , get

Yu whence T _p (o) = Tn (and _t ) with β = 2.

These expressions allow you to choose the value of a, providing a mini

The maximum conversion time is Tp, which is reached at a- 2. In this case, Tpmin ~ 3ΝΓπΐθ ⁼ 3 / (Π.

Thus, the minimum conversion time in the proposed method

20 is three periods of the maximum frequency when converting voltage to frequency.

Figure 1 shows a block diagram of an analog-to-digital conversion device that implements the proposed method; figure 2 - diagram of the control unit; on fig.Z - time diagram of his work.

In figure 1 - 3 shows the bus input and _x and the reference and ₀ 2 voltage, having

30 ratio and ₀ ⁼ 2i _xt . bus conversion result code 3, start the ADC to work 4 and end conversion 5, analog switch 6, which has an input with an output when there is a signal on the control

35 input, the Converter 7 voltage to pulse frequency (FLA), analog switch 8, in which the output is connected to the first input when there is a signal on the control, the input and the second input when

40 in the absence of this signal, a digital-to-analog converter 9 (D / A converter) with a memory register for writing a code and with DC ZT

Δη = -7 / - / -— =. -, reversible counter Ζ Mt ght

45 th with control input of the subtraction mode, capacitance 2Νπι, driver 11 pulses, first 12 and second 13 elements OR, element AND 14, control unit 15, shifting register 16, having entry of 50 entries "1" to the low order and input for pulses , the generator 17 pulses of the reference frequency ί ₀ , the one-shot 18, the driver of the 19 pulses, the elements AND 20 and OR 21, the pulses from the output of the FLA 22,

55 pulse 23 start bus 4, signals 24 and 25

at the outputs of the second and third bits of register 16, the last one is served on

bus 5, the pulses 26 and 27 with the outputs of the elements OR 21 and OR 13.

Τ η (o) - · ο (

to f _about

to ir / β psch

- (β + 1) Ht That

k and ₀ Νπτ x _

ki ₀ ^}

five

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6

The method is as follows.

Subtraction from the reference voltage 11 _{0 of the} input voltage is carried out in the FNC 7, which has summing and subtracting inputs. This occurs after receipt of the pulse 23, which sets the "O" in the code in the counter 10 and in "G" the first digit of the register 16.

After pulse 23, the first pulse 22 shifts “1” to the second digit of register 16, the output signal 24 of which connects voltage and _x to the subtracting input of the FLL 7. With the help of key 6, since its summing input has voltage from switch 8 output due to the absence of a signal at its control input, then for a signal 24, the difference and _n = and _o are transformed into the first frequency ίι.

The conversion of the period ΐι of this frequency into an intermediate code is carried out using the counter 10 and the generator 17 pulses having the frequency част _ο . Its pulses pass through an element of AND 14, which is opened by a signal 24 passing through an element OR 12 to the input of counter 10, where the code ηι = ΐιί _{ο is} obtained. The period ends with the arrival of the second pulse 22 after the impulse 23. The signal 24 is removed and the driver 19 with its pulse 26 passing through the element OR 21 writes the code u from counter 10 to the DAC register 9.

To exclude the recording of an invalid code ηί caused by transients in counter 10, when pulse 26 coincides with pulse ₀ , block 15 introduces the elements AND 20, OR 21 and the one-shot 18, which in this case starts on the leading edge of the signal element And 20, and its output signal, combined in the element OR 21 with pulse 26, shifts the write code η in the DAC 9 at the end of the transient processes in the counter 10.

Converting the intermediate code into voltage 11ι = Λι-πι performs the DAC 9, and converting 1 to the second frequency of the IFF 7. With the removal of the signal 24, the key 6 switches off the voltage and _x from the IF 7, and the signal 25 switches the voltage to it using switch 8 1) ι, which is converted to the second frequency Tg.

The conversion of the period n of this frequency to the second code ng is also performed ^ with the help of counter 10 and frequency pulses получение ₀ , while the receipt of ng = TgTo is combined in time with the subtraction of n ₂ from the code equal to the quotient from dividing the reference voltage by the quantum value, t. e. equal

υ ₀ / Δη = 2Νπι, thanks to this, in counter 10, the result is χ = (2Νπτη ₂ ).

After writing the code η 1 in the D / A converter 9, pulse 26 starts the driver 11, the pulse 27 of which sets "0" to the code in the counter 10. Since its capacity is 2Νπι, then at subtraction of at least one pulse in the counter 10, the code is received (2Νπτ 1 ) and then it decreases for ί ₂ signal 25, which in it turns on the subtraction mode and, passing through the element OR 12, allows the passage of pulses ί _ο to its counting input. After 1 ₂ in the counter 10 receive the code

χ = (2Νπι-ί2ίο) ~ (2Ν! η-π ₂ ),

which is the result of conversion. About its readiness informs the termination of the signal 25, issued on the bus 5. To receive x spent time времяη = (ι + ΐ2). as well as the time from pulse 23 to the first pulse 22, which is due to the non-synchronism of the appearance of these pulses. The largest value of this time is equal to one period of the frequency Gt, since a voltage of 11 ° is connected to the FNC 7 at this time. Therefore, the total longest conversion time is

Claims (3)

Claim 1. The method of analog-digital conversion, which consists in the intermediate conversion of the first voltage to the first frequency and the formation of the first code,> the conversion of the first code to the second voltage, the intermediate conversion of the second voltage to the second frequency, the formation of the second code, the formation of the result by subtracting the second code, different the fact that, in order to improve speed, as the first voltage, use the difference of the reference and convertible voltages, the formation of the first and second codes It is calculated by filling the duration of the first and second frequency periods with the reference frequency, respectively, and when generating the result, the second code is subtracted from the quotient of the reference voltage divided by the quantum value of the second voltage. 2. Device for analog-to-digital conversion, containing a voltage to frequency converter pulses, the first input of which is connected to the output of the analog switch, the first information 1679632 The output of which is connected to the output of the D / A converter, and the output of the voltage to pulse frequency converter is connected to the first input of the control unit, the second input of which is the start bus, the first output is connected to the control input of the analog switch, a reversible counter, the outputs of which are output bus and connected to corresponding information inputs of the digital-to-analog converter, the control input of which is connected to the second output of the control unit, characterized in that In order to increase speed, an analog key, two OR elements, an AND element and a pulse shaper are entered into it, through which the second output of the control unit is connected to the first input of the first OR element, the second input of which is a 2 start bus, and the output is connected to the reset input of the reversible counter, the counting input of which is connected to the output of the AND element, the first input of which is connected to the third output of the control unit, and 2 the second input is connected to the output of the second OR element, the first input of which is the terminal bus rofessional, combined with the control input of the reversible counter and connected to first d the output of the control unit, the fourth output of which is connected to the second input of the second element OR and the control input of the analog switch, whose information input is the input bus and the output connected to the second input of the voltage converter to the pulse frequency, and the second information input of the analog switch is the reference voltage digital-analogue converter. 3. The device according to claim 2, characterized in that the control unit is made on the shift register, pulse generator, one-shot, pulse shaper, elements AND and OR, the output of the last of which is the second output of the block, the first input through the one-shot is connected to the element And, the first input of which is connected to the output of the pulse generator and is the third output of the block, the second input is combined with the second input of the OR element, through the pulse shaper connected to the first output of the shift register and is the fourth you the stroke of the block, the first output of which is the second output of the shift register, the first and second inputs of which are respectively the first and second inputs of the block. FIG. 7 1679632 22 23 28 25 25 21 -g * Start / g Zap or 13 fig.Z