SU1656519A1 - Device for information input - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in keyboards for inputting information. The purpose of the invention is to increase the reliability of operation in conditions of an increased level of various interference by eliminating faulty information. The goal is achieved by those. that the device containing pulse generator 1, differentiating chain 2, keyboard 3, multiplexer 7, rectifier 8, integrator 9, two comparators 10.11, trigger 15 and counter 16, are inserted pulse generator 13, key 12 and block 14 of signal extraction interference. 1 hp f-ly, 3 ill.

Description

The invention relates to automation and computing and can be used in keyboard input devices.

The purpose of the invention is to increase the reliability of the device.

FIG. 1 is a functional block diagram of the information input device; Fig. 2 is a functional block diagram of the interference signal extraction unit; FIG. 3 shows timing charts for the operation of the interference signal extraction unit.

The device (Fig. 1) contains a pulse generator 1, the output of which through a differentiating chain 2 is connected to the input of the keyboard 3 containing capacitive dividers, each of which consists of a variable capacitor 4 buttons and a fixed capacitor 5, and n emitter repeaters 6 The outputs of which are the outputs of the keyboard 3 and are connected to the corresponding information inputs of the multiplexer 7, the output of which is connected to the input of the rectifier 8, the output of which through the integrator 9 is connected to the corresponding inputs of the comparators

10 and 11, and the input of the comparator 10 through the switch 12 is connected to the pulse shaper 13, the input of which is connected to the output of the rectifier 8, the outputs of the comparators 10 and

11 connected separately with the first and second information inputs of the block 14 of the interference signal, the clock input of which is connected to the output of the pulse generator 1, and the output to the installation input to the trigger unit 15, the installation input to zero of which is connected to the comparator output 11, and the output from control input of counter 16. In Fig. 1, informational outputs 17 and 18 of the device are also indicated.

Interference signal block 14, the functional scheme of which is shown in FIG. 2, contains the first and second T-flip-flops 19 and 20, the first element OR 21

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and the element AND NOT 22, the first element AND 23, the counter 24 with the counting module n, the one-shot 25, the second element OR 26, the second element AND 27, the delay element 28.

The device works as follows.

In the initial state, when no button of the keyboard 3 is pressed, the trigger 15 is in the state O and the counter 16 generates a sequence of addresses according to which the multiplexer 7 performs cyclically repeated polling of the keyboard 3. At the same time, the signal at the output of the integrator 9 is lower than the lower level threshold of comparing At the outputs of the first 10 and second 11 comparators, O and 1 are present, respectively, and 1 sets the T-flip-flops 19 and 20 and the counter 24 with the counting module p to the O state.

When you press the keypad button, the capacitive dividers level 4 and 5 successively pass through the lower and upper comparing thresholds and the interference signal extraction unit 14 is activated.

When passing through the lower comparing threshold, at the outputs of comparators 10 and 11, respectively, O and O are present, with flip-flop 15, T-flip-flops 19 and 20 and counter 24 remain in the initial state, i.e. in O.

When crossing the upper comparing threshold at the outputs of comparators 10 and 11, respectively, 1 and O are present, and the signals from the output of comparators 10 and 11 appear in the form of pulses with a repetition period equal to the polling cycle duration (Fig. 36), i.e. Ttsikl (n + 1) Timp., Where n - the number of keyboard keys 3; Timpe is the duration of the pulse repetition period of the pulse generator 1.

The first pulse generated by the pulse shaper 13 and the key 12 from the output of the comparator 10 T-flip-flop 19 on the leading edge is transferred to state 1 (FIG. 3b), while the counter 24 starts counting, since the prohibition is removed through the OR element 21, and the flip-flop of triggers in the counter 24 is performed on the falling edges of the pulses from the pulse generator 1. The second pulse from the output of the comparator 10 (FIG. 36) transfers the T-flip-flop 19 to the state O and at the same time the T-flip-flop 20 to the state 1 (fig.Zv, d). The counter 24 stops counting and is set by the falling edge of the n-th pulse of the pulse generator 1 (FIG. 3A) to state T (FIG. 3D). This creates a situation (FIG. Ze) when level 1 is present at all inputs of the element 23 and that triggers the trigger 15 to state 1. The counter 16 is blocked and the keyboard 3 is polled at the address where the counter 16 is locked to since then. until

This keypad button 3 is pressed. The code at the outputs 17 of the counter 16 with a signal at the output 18 of the flip-flop 15 represents the output signal of the device, namely the code of the pressed button of the keyboard 3 in binary representation. Level 1 from the output of the counter 24 through the element OR 21 gives permission for the passage of the first pulse of the next sequence from the generator 1 of pulses (fig.Za), which is on the back

5, the front translates the counter 24 into the state O (FIG. 3D), and a one-shot 25 (FB) operates on the falling front, which translates the T-flip-flops 19 and 20 and the counter 24 to the initial state, i.e. in O. At the same time

0, the trigger 15 remains in the state 1, which provides input of the code of the pressed button of the keyboard 3.

When you release the keyboard button 3, a sequential transition occurs

Voltage level 5 capacitive dividers 4 and 5 through the upper and lower thresholds of comparing. At the same time, when passing through the upper threshold of comparing, T-triggers 19 and 20 and counter 24 remain in the initial

0 O state, which provides input of the code of the pressed button. When passing through the lower threshold of comparing at the outputs of comparators 10 and 11, respectively, O and 1, and the signal 1 sets the trigger 15

5 and, accordingly, the entire device is in the initial state. The presence of the dead zone of the device by the input signal, determined by the difference in the reference voltages, provides protection against jitter

0 operator's finger when you press the keyboard button.

In the presence of a single interference

(Tpomekh Ttsikl (n + 1) Timpul impulse s OUTPUT

comparator 10 sets T-flip-flop 19 5 to state 1, counter 24, counting to n, triggers a one-shot 25, which sets T-flip-flops 19 and 20 and counter 24 to O, and, accordingly, flip-flop of trigger 15 does not occur. The same repetition is 0 with the appearance of subsequent impulse noise of this type.

If interference occurs with a repetition period shorter than the cycle period, i.e. Tpomeh Ttsikl (n + 1) Timp, the first impulse that occurred at the output of the comparator 10 when passing through the upper comparing threshold, sets 19 to state G, the latter through the element OR 21 removes the ban from AND 27, and counter 24 starts counting and, without counting to n, stops by the interference pulse, which sets T-flip-flops 19 and 20 respectively to O and 1. At the same time, the output state of the counter 24 is O, therefore, the output of the element 23 always maintains the level O , keeping trigger 15 in state, O. At the third impulse T- the triggers 19 and 20 are transferred respectively to states 1 and G, which provide the prohibition signal for the AND 23 element from the output of the AND-HE element 22, and the counter 24 continues to count to n, then through the OR element 26 after the one-shot 25 operates sets the T-flip-flops 19 and 20 and the counter 24 to the initial state, and this process is repeated with the appearance of subsequent pulses. This process is repeated when mixing a useful signal and interference pulses, as well as in the case of pressing two or more buttons simultaneously, i.e. in this case there is an element of uncertainty, and there will be no input of information in such a situation.

Delay element 28 can be accomplished with an ordinary RC chain and serves to compensate for the delay obtained by integrator 9.

The invention provides an increase in the reliability of operation in conditions of an increased level of various interferences by eliminating faulty information by introducing into the device a signal extraction block, which makes it possible not to introduce spurious signals from the appearance of various kinds of impulse interferences in the information circuits of the device.

Claims (2)

1. An information input device comprising a pulse generator, a differentiating chain, a keyboard consisting of capacitive dividers, the middle point of each of which is connected to the input of the corresponding emitter follower, a multiplexer, a rectifier, an integrator, two comparators, a trigger and a counter, with the output the pulse generator is connected to the counter input of the counter and through the differentiating chain to the input of capacitive dividers, the outputs of the emitter repeaters are connected to the information inputs of the multiplexer, the output orogo connected to the input of the rectifier, the output of which integrator is connected through a first second-input comparator, second inputs of first and The second comparators are connected to the corresponding bus of the sources of reference voltages, the output of the second comparator is connected to the installation input to the O flip-flop, the output of which is connected to the input of the counter and is the device ready output, the outputs of the counter are connected to the address inputs of the multiplexer and are information outputs Devices, characterized in that, in order to increase the reliability of the device, a pulse shaper, a key and an interference signal extraction unit are inputted into it, the first and second information inputs of which connected to the outputs of the first and second comparators, the output of the pulse generator is connected to the clock input of the interference suppression unit, the output of which is connected to the setup input of 1 trigger, the output of the rectifier is connected via a pulse shaper to the control input of the key, the information input of which is connected to the output of the integrator The key output is connected to the first input of the first comparator. 2. Device pop. 1, characterized in that the interference signal isolation unit contains the first and second triggers, the first and second elements OR, the first and second elements AND, the NAND element, the counter, the delay element, the one-shot, the information input of the first the trigger is the first information input of the block, the output of the first trigger is connected to the information input of the second trigger and the first inputs of the first OR element and the NAND element, the output of which is connected to the first input of the first element AND whose output is the output of the block The trigger is connected to the second inputs of the NAND element and the first element AND, the first input of the second element OR is the second information input of the block, the output of the second element OR is connected to the reset inputs of the triggers and the counter, the output of which is connected to the third input of the first element AND, the second the input of the first element OR and through the one-shot with the second input of the second element OR, the input of the delay element is the clock input of the block, the output of the delay element is connected to the second input of the second element AND, the output of which is connected to the clock counter input, an output of first OR gate coupled to a second input of the second element I. 4th , 1 l “V II I I 1.P " with i