SU1651354A1 - Programmed transversal filter - Google Patents

Abstract

The invention relates to radio engineering, in particular, to devices for temporal processing of electrical signals, and can be used to correct repeats (echoes) in television. The purpose of the invention is to increase the tuning speed. This goal is achieved due to the fact that a programmable transversal filter containing a ring counter 1, two groups of switches 3 and 4, analog memory cells 5, an adder 13, a generator 14, a driver 15 and a control block 17 are inserted a ring counter 2 , multiplier 12, elements OR 8 and 9, and elements AND 10 and 11. 3 ill. i (L

Description

The invention relates to radio engineering, in particular, to devices for temporal processing of electrical signals, and can be used to correct repeats (echoes) in television.

The purpose of the invention is to increase the speed of adjustment.

Figure 1 shows a structural electrical circuit of a programmable transversal filter; Fig. 2 is a structural electrical circuit of the control unit; Fig. 1 shows a structural electrical circuit for the distortion detector.

The programmable transversal filter contains the first and second ring counters 1 and 2G; switches of the first 3 ... 3 and second 44 ... 4N

groups, analog cells 5 ... 5N memory, input 6, bus 7, first and second elements OR 8 and 9, first and second elements AND 10 and 11, multiplier 12, adder 13, generator 14, driver 15 pulses, clock bus 16, control block 17.

The control unit 17 contains a frame sync pulse selector 18, a horizontal sync pulse selector 19, an analog-to-digital converter (ADC) 20, a distortion detector 21, triggers 22 and 23, a pulse former 24, a register C25 and a digital-analog converter (DAC) 26.

The distortion detector 21 includes triggers 27-29, comparator 30, memory cells 31 and 32, switches 33 and 34.

The filter works as follows When passing through the scanning first ring counter 1 of a single signal (for example, logical 1) into each analog cell 5 | ... 5m, which is a MOS capacitor, the corresponding switch 3 ... 3N of the first group is charged d, proportional to the analog signal at input 6, and when passing through the second ring

the single-signal counter 2 of the logical 1 charge voltage of the analog cells 5, ... 5 is transmitted via the corresponding switch 4 ... 4jg of the second group to the bus 7. Therefore, the input signal is recorded using the first ring counter 1, and the second is read ring counter 2. From to

0

0 5 Q

five

by stupefying the second inverting inputs of elements 10 and 11 of a signal with a duration greater than TN (where T is the period of the clock signals from generator 14 and N is the number of bits of ring counters 1 or 2) and closing them, the signals of logical 1 in ring counters 1 and 2 is not passed to the output and is erased. A frame clock pulse is used as the erase signal from block 17, for example, in television. At the end of the erase signal, the pulse signal generated in block 17 is entered through the first element SLI 8 and the open element AND 10 into the first discharge of the first ring counter 1 and input 6 begins to record the information part of the signal in the analog cells 5 through switches 3.

After a predetermined time T, the pulse from the second output of block 17 through the second elements OR 9 and I 11 is entered into the first discharge of the second ring counter 2 as logical 1. From this moment, the signals from the analog cells 5 are received (read) from the analog cells 5 7

From bus 7, the signal goes to a multiplier 12, the multiplication factor of which is set from the fourth output of block 17 in accordance with the amplitude of the echo; it was added to the main signal.

Thus, from input 6, the adder 13 receives the main distortion signal, summed with the echo signal, and the bus 7 - the inverted echo signal. At adder 13, these signals are added up and a filtered signal with no distortion appears at the output.

The formation of erase signals and programming recording signals occurs in block 17 as follows.

For detection, i.e. detection of host signals, that part of the signal is highlighted, in which there is only a service sign and an echo signal caused by it.

In particular, in a television signal, a sync pulse with no information in the string follows the frame sync pulse.

In block 17 (FIG. 2) the frame sync pulse, selected by the selector 18, goes to the third output as

316

the erase signal, by its decay, flip-flop trigger 22 enables the flip-flop 23. With the arrival of the sync pulse of the flip-flop 23, the flip-flop 23 tilts and in the shaper 24 a pulse is generated, which from block 17 is entered into the first ring counter 1. the reset input of the trigger 22 and the setting of the first ring counter 1 is terminated.

The pulse from the imaging unit 24 enters the detector 21, allowing its work on the analysis of the input signal. The input signal in block 17 is fed to 20 and the register 25, the information in which is recorded with the arrival of a pulse from the output of the detector 21, i.e. the amplitude of the distorted signal is recorded. This code in register 25 is converted by a DAC 26 into an analog signal, which from the fourth output of block 17 controls the multiplier 12.

The vector of distortion 21 works as follows.

The impulse at the input of the trigger 27 overturns it and enables the operation of the trigger 28. The information recorded by the switch 34 in the memory cell 32 is compared with the contents of the memory cell 31 received thereafter through the switch 33 controlled by logic 1 from the output of the trigger 28 The undistorted signal has equal amplitudes in cells 31 and 32, and the distorted signal is unequal. This moment is detected by trigger 29. At the second ring counter 2, the pulse arrives with a corresponding delay relative to the trigger. A pulse from the output of trigger 2 through the R input of trigger 27 closes it and the tuning of the second ring counter 2 ends.

Block 17 provides automatic transfer of the filter from the configuration mode to the operating mode and vice versa. I

It should be noted that the operation of the presented filter is described for the case of the correction of distortion caused by a single echo signal. It is obvious that in order to correct distortions caused by several echoes, it is necessary to increase by an appropriate number of times the number of counters 2, switches 4, multipliers 12. The optimal number of bits of the ring

I3546

counters and, accordingly, analog memory cells, you can determine m

formulas N ---, where T, is the time of

the maximum shift of the corrected distortions introduced by the echo signal; T is the period of the clock pulses.

ten

Claims (1)

Invention Formula Programmable transversal filter containing the first ring the counter, N switches of the first group, whose inputs are the input of a programmable transversal filter, and the control input of the 1st switch of the first group, where i 1, N, is connected to the output of the i-ro bit of the first ring counter, N analog cells the memory, the input of the i-th of which is connected to the output of the 1st switch of the first group, the second group of switches, the input of the 1st of which is connected to the output in the analog memory cell, and the outputs of the switches of the second group are combined, the adder and the series-connected generator imp driver The output of which is connected to the clock input of the first ring counter, and the control unit, characterized in that, in order to increase the tuning speed, a multiplier is inserted connected between the outputs of the switches of the second group and the first input of the adder, the second ring counter, the output of the 1st bit yes which is connected with the control input of the 1st switch of the second group, the first and second elements OR, and the first and second elements AND, the first output of the control unit being connected via serial 5, the connected first OR and AND elements with the input of the first ring counter, the output of which is connected to the second input of the first OR element, the second output of the control unit is connected via serially connected second elements OR and AND with the input of the second ring counter, the output of which is connected to the second input of the second element OR, the third output of the control unit is connected to the second inputs of the elements And, the fourth output of the control unit is connected to the second input of the multiplier, the input of the control unit is connected to the second input of the adder and the inputs of the switches of the first group, and the clock input of the second ring the counter is connected to the output of the pulse driver. fig.Z FIG. I