SU1647480A1 - Binary filter for magnetic resonator system - Google Patents

Abstract

The invention relates to the field of magnetic measurements using instruments based on the phenomenon of magnetic resonance, and can be used to isolate a pulsed signal against the background of intense noise and interference. The purpose of the invention is to improve the accuracy of the emission of a magnetic resonance pulse. The filter contains the first element AND connected in series, the shift register, the OR element and the second element AND, as well as the clock generator, the unit for setting to one, and the initial zeroing unit. The output of the latter is connected to the second input of the second element, And, the output of which is connected to the second input of the shift register. The third register input is connected to the second input of the OR element and to the first input of the first AND element, the second input of which is connected to the output of the shift register. The fourth input of the register is connected to the output of the clock generator, and the fifth input is connected to the output of the unit to the unit. The proposed filter scheme provides high accuracy in extracting a pulsed magnetic resonance signal not only by eliminating false positives due to large amplitude interference, as in the prototype, but also by recovering the useful signal during a short-term loss. 3 il. l y

Description

The invention relates to the field of magnetic measurements using instruments based on the phenomenon of magnetic resonance, and can be used to emit a useful pulse signal against the background of intense noise and interference.

The purpose of the invention is to improve the accuracy of the emission of a magnetic resonance pulse.

Figure 1 shows the block diagram of the filter; in FIG. 2, a state register of the shift register; on fig.Z - timing charts of the filter.

The binary filter contains an n-bit shift register (CP) 1, an OR 2 logical element, two AND 3, 4 logical elements, a block 5 for initial zeroing of the filter output (BNO), a clock generator 6 (GTI) and a setting block 7 in the unit (BUE).

The first inputs of the OR 2 and AND 3 elements, connected to the CP 1 input, intended for storing information in a sequential code with a right shift (D + input), are the filter input. The highest bit of the output of the CP 1, connected to the second inputs of the elements OR 2 and AND 3, is the output of

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filter house. The output of the element OR 2 is connected to the first input of the element AND 4, the second input of which is connected to the output BNO 5, and the output to the input of the setting to zero (input R) CP 1, The output of the element And 3 is connected to the control input (input V2) CP 1 and the input of the GTI 6 is connected to the clock input (input C) of the CP 1. The output of the BUE 7 is connected to the inputs D of the CP 1, which are intended to store information in a parallel code.

The filter works as follows.

To the input of the filter from the comparator of the magnetometer (not shown in the figures) impulses of interference and the useful signal are received, and the interference can be conventionally classified as a false pulse and the disappearance of the useful impulse.

Consider the case of the arrival at the filter input of a useful signal with a duration tc at the comparator threshold level of more than tc ZTS, where Tc is the period of clock pulses, together with broadband noise, whose pulse duration is tn ZTS (FIG. 3a). In Fig. 3a, the signal without interference is indicated by a dotted line, the dotted straight line is the comparator threshold level, Fig. 36 shows GTI clock pulses 6. When the threshold is exceeded, a logical 1 signal is generated at the comparator output, which is successively entered into the SR 1 with a shift to the right, after three cycles of pulses from the output of the GTI 6, the positive differential of the next clock pulse goes to the filter output and is fed to the second inputs of the OR element 2 and the AND 3 element, the input of which also has a logical level of 1. As a result The CP 1 organizes the parallel input mode of logical 1, and with the arrival of a positive clock pulse, the logic level 1 appears on all the CP 1 outputs. If, due to interference, the sum signal falls below the comparator threshold (interval T4 in FIG. 3a), parallel input of information is stopped, since the first input of the element And 3 receives the level of logical O. In this case, the CP 1 organizes the sequential recording mode with a shift to the right, since the second input of the element OR 2 is fed 1, which goes further to the input of the installation in О СР 1 (Fig. 3g). The logic level O input to the (D +) CP 1 is recorded into the lower bit of the CP along the positive differential of the first clock after the zero setting at the output of the clock pulse comparator and shifted to the right by one bit for each subsequent clock pulse. FIG. 3 shows logical levels at the output of the first discharge of CP 1, FIG. Z, C, and - the same at the outputs of the second, third

and the fourth bits of CP 1, respectively. Since the duration of the interference tn at the level of the comparator triggering is less than 3TC, the logical O does not have time to reach the higher bit (fig.Ze, g, g, g) and

the moment when the input signal exceeds the threshold of the comparator (Fig. 3a) in CP 1 is organized the parallel recording mode, which takes place when the logical level 1 is present at the inputs V2, R and C (figure 2). As a result, all the output bits With Phi, a positive differential clock of the clock pulse again records the level of the logical 1st, including those into which logical O were recorded (Figs. Ze, f, g, and).

Thus, the proposed filter filters out RF interference and eliminates the fragmentation of the useful signal, as a result of which the measurement accuracy is improved.

Claims (1)

Invention Formula The binary filter is predominantly for magnetic resonance systems, containing a clock pulse generator and logic elements AND, characterized in that, in order to improve the accuracy of the extraction of the magnetic resonance pulse, an n-bit shift register is inserted into it, an initial zero-out block for the output of the filter, a unit for installation into the unit, and an ILM element, the first input of which is connected to the first input of the first element I and to the information input of the shift register intended for storing information in a sequential code with a right shift, the most significant output of which is connected to the second the inputs of the OR element and the first AND element whose output is connected to the control input of the shift register, the input of which is set to zero is connected to the output of the second element I, the first input of which is connected to the output of the initial zeroing unit, and the second input to the output element OR, and the output of the unit setup unit is connected to the n information inputs of the shift register, intended for storing information in the parallel code, the clock input which is connected to the output of the clock generator, the input of the filter is the first input of the OR element, and the output is the highest output of the shift register. JU1 A + C v n to Fig.i $ ig.1 h) H) Fig.Z t