SU1631695A1 - Digital frequency spectrum generator - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to expand the range of the generated signals. The digital frequency spectrum generator contains sensor 1 of the frequency code, first register 2 of memory, first block of elements 3, first accumulating adder 4, first converter 5 codes, multiplier 6 codes, low pass filter 7, sensor 8 frequency increment code, second register 9 memory, the second block of elements And 10, the second accumulating adder 11, the second converter 12 codes and the clock generator 13. Using the sensor 1 frequency code and sensor 8 code frequency increment in the first and second registers 2 and 9, the value of the required lower value is entered th frequency generated spectrum and frequency increment. The signals from the first and second accumulating adders 4 and 11 are fed to the inputs of the first and second converters 5 and 12 codes, the signals from the outputs of which are the values of samples of the synthesized signals that are multiplied using multiplier 6 codes and extracted using filter 7. 1 silt k

Description

The invention relates to radio engineering and can be used in devices of measuring equipment.

"And = sin [4r (f Δί) · ί] (5)

The purpose of the invention is the expansion of the range of generated signals.

The drawing shows a structural diagram of a digital spectrum generator hour (6) one.

The digital frequency spectrum generator contains a frequency code sensor 1, a first memory register 2, a first block of AND 3 elements, a first accumulating adder (NS) 4, a first code converter 5, a code multiplier 6, a low-pass filter 7, a frequency increment code sensor 8, and a second a memory register 9, a second block of AND elements 10, a second HC 11, a second code converter 12, and a clock 13.

A digital frequency spectrum generator operates as follows.

Before starting work, using the sensor 1 of the frequency code, the number calculated by the formula _{Ni +} -P 7.5 is entered in the first register 2. _Δίι (1) where f is the required value of the lower frequency of the formed spectrum;

η is the number of harmonic components in the formed spectrum;

Δ f is the frequency increment of the harmonic components of the spectrum.

Using the sensor of the code increment frequency 8 in the second register 9 is written the number N2 equal to

(2)

For each pulse of the clocks of the generator 13 through the corresponding first and second blocks of elements And 3 and 10 is the summation of the contents of the first. NS 4 with the number Νι entered in the first register 2, and the summation of the contents of the second HC 11 with the number Na entered in the second register 9. Weekend the signals of the first and second NS 4 and 11 are fed to the inputs of the first and second code converters 5 and 12, for which it is advisable to use read-only memory devices, while the ordinates of the function should be stored in the first code converter 5 yi = sln x (0 <x <2 π), (3) and the second inverter 12 to be stored codes ordinate function slnnx sinx (4)

The signals from the outputs of the converters 5 and 12 codes are the values of the samples of the synthesized signals of the form:

^sin ('4r'4 ^'')

These signals are multiplied using a multiplier 6 codes, which can be used, for example, two multiplying digital-to-analog converters (not shown). The first DAC of such a code multiplier is designed to generate a reference voltage proportional to the digital samples of the signal (6), and the second DAC, to the code inputs of which the digital ordinates of the first code converter 5 are supplied, and the reference voltage is the voltage from the output of the first 20 DAC, generates at its output synthesized step approximation signal g (t) of a given polyharmonic signal

9 (t) = Σ slnokt. (7) k - o

Using filter 7, smoothing the shape of the output signal.

We show that the synthesized step 3th function g (t) is indeed an approximation to a given polyharmonic signal.

Suppose the expression (7) (8) where Wk ^_ frequency of k-th harmonic component of the synthesized signal polyharmonic containing n of harmonic components;

“The pulse repetition period of the reference frequency generator or the sampling interval;

N is the maximum number of different samples of the synthesized signals gi (t) and dg (x) 45 at the outputs of the first and second code converters 5 and 12 (the value of N is determined by the capacity of the first and second HC 4, 11).

Taking into account the accepted notation, the synthesized step functions gift) and qy 50 at the output of the first and second code converters 5 and 12 can be written in the form: _9i (t) = Σθδίη [~ (f + ^Δί ) '] ft) ^: ( ⁹ ) ⁵⁵ '92 (0 =

N - 1 = Σ

J = o

(t).

where ηι (t) and η \ (ΐ) are basic stepwise react functions from the N-dimensional set of step functions, and:

for ti <t <ΐ I + 1 for + l '5 (11) for η <ΐ <11 +1

PRI ’(12)

The step function g (t) = gi (t) .g2 (t), ^ιυ is formed at the output of the multiplier of 6 codes, due to the orthogonality of the reaction functions

ΉΌ = {o ^ (Ό = {J and, considering that

JjyiG)] ² = i? (T), (13) _'15 represent as follows

9 (0

N —1 sin (-yy'l · Δί-i _ 2 ^v N______ ^{1 = 0} Sin (-g- · Δί · i) ^{x sln} [^ r ( ^{f + _π} τ ^{± Δί} ) ⁽¹⁴⁾ Using the classical expansion g (t) in the trigonometric Fourier series, it is easy to show that the initial part of the spectrum of the function g (t), up to a constant factor pl N, completely coincides with the synthesized polyharmonic signal. The high-frequency components of the step signal 35 g (t) can be significantly attenuated by the filter 12, included at the output of the code multiplier.

The proposed structure of a digital generator of the frequency spectrum makes it possible to generate the value of individual samples of the polyharmonic signal during one clock cycle 13. The number of harmonic components of the synthesized frequency spectrum is limited only by the permissible frequency value of the higher harmonic component and is set by selecting the corresponding second code converter 12. A change in the number of harmonic components ςθ in the spectrum can be obtained by changing the storage device of the second code converter 12 or reprogramming it.

The change in the band of the formed spectrum is made by changing the number Δί recorded in the sensor 8 of the frequency increment code, the shift of the spectrum band along the frequency axis is carried out by entering the corresponding number f in the frequency sensor 1. Thus, the formation of the output signal, which is a frequency spectrum, is carried out and is provided with the ability to change the spectrum parameters. This ensures the formation of a sample of the output signal for one clock cycle of the reference frequency generator. This makes it possible to at least ow increase the higher frequency of the formed spectrum. The structure of the digital frequency spectrum generator is simplified, and by changing the second code converter 12 of the memory device, the number of harmonic components in the spectrum can be changed without changing the structure of the digital frequency spectrum generator.

Claims (1)

Claim A digital frequency spectrum generator containing serially connected frequency code sensor, first memory register, first AND block, first accumulating adder, serially connected frequency increment code sensor, second memory register, second AND block and second accumulating adder, multiplier codes and clock generator The output of which is connected to the control inputs of the first and second blocks of elements AND, characterized in that. In order to expand the frequency range of the generated signals, a first code converter, a second code converter and a low-pass filter, whose input is connected to the output of a code multiplier, are entered, the first and second inputs of which are connected respectively to the output of the first code converter and the output of the second code converter, whose input is connected with the output of the second accumulating adder, and the output of the first accumulating adder is connected to the input of the first code converter.