SU1624487A1

SU1624487A1 - Function converter

Info

Publication number: SU1624487A1
Application number: SU894639308A
Authority: SU
Inventors: Виталий Георгиевич Беляков; Тамара Борисовна Громова
Original assignee: Предприятие П/Я В-2672
Priority date: 1989-01-18
Filing date: 1989-01-18
Publication date: 1991-01-30

Abstract

Изобретение относитс к аналого- цифровой вычислительной технике и может быть использовано в устройствах дл воспроизведени функции одной переменной Цель изобретени - улучшение точности. Преобразователь содержит три усилител , блок сравнени , четыре аналого-цифровых преобразовател , блок пам ти, масштабирующие резисторы, масштабирующий усилитель. При подаче на вход преобразовател скачкообразного напр жени один из компараторов по соответствующим величинам рассогласовани на выходах усилителей 1, 2 определит направление поиска номера интервала. В зависимости от направлени поиска код реверсивного счетчика 12, определ ющий номер участка интерпол ции , увеличитс или уменьшитс . Поиск прекращаетс , когда входна величина х попадет в такой интервал, где выполн етс условие хнач | х XKOH, i. При этом код реверсивного счетчика вл етс адресом , по которому из запоминающего устоой- ства 13 извлекаютс параметры дл интерпол ции функциии на данном интервале Введение масштабного усилител 8 с регулирующим коэффициентом передачи, подключенного последовательно с умножающим цифроаналоговым преобразователем (УЦАП) 7, приводит к увеличению точности, т.к УЦАП 7 при этом работает в режиме со старшими разр дами. 1 з.п. ф - лы, 2 ил.The invention relates to analog-digital computing and can be used in devices for reproducing the function of one variable. The purpose of the invention is to improve accuracy. The converter contains three amplifiers, a comparison unit, four analog-digital converters, a memory unit, scaling resistors, and a scaling amplifier. When applying a voltage jump to the input of the converter, one of the comparators will determine the direction of the interval number search by the corresponding error values at the outputs of the amplifiers 1, 2. Depending on the direction of the search, the reversible counter code 12, which determines the number of the interpolation region, will increase or decrease. The search is terminated when the input value x falls in an interval where the condition xn | x XKOH, i. The reversible counter code is the address at which parameters are extracted from memory 13 to interpolate functions in a given interval. Introducing a scale amplifier 8 with a control gain connected in series with a multiplying digital-to-analog converter (UCAP) 7 increases the accuracy , because UCAP 7 at the same time works in the mode with higher bits. 1 hp f - ly, 2 ill.

Description

UlUl

hNKlA /hNKlA /

иand

ItIt

LL

Фиг. 2FIG. 2

Claims

Claim

1. A functional converter comprising a comparison unit, a reversible counter, a memory unit, a summing amplifier, two subtracting amplifiers, four digital-to-analog converters and a first scaling resistor, the input of the device argument being connected through the first scaling resistor to the subtracting input of the first subtracting amplifier, the output of which is connected to the first input of the comparison unit and the voltage input of the first digital-to-analog converter, the output of the second subtracting amplifier is connected to the second input of the unit input, the first one is.? .- whose code is connected to the input of the summation of the reverse counter, the second output of the comparison unit is connected to the subtraction input of the reverse counter, the output of which is connected to the address input of the memory unit, the outputs of the signs of the tangent of the tilt angle, the reference value of the function, the final value of the interval and the initial value of the interval is connected to the code inputs, respectively, from the first to the fourth digital-to-analog converters, the output of the second digital-to-analog converter is connected to the first input of the summing amplifier, the output of which is connected to the output of the device, it is important that, in order to increase the conversion accuracy, a scaling amplifier and a second scaling resistor are introduced into it, and the input of the device argument is connected through the second scaling a resistor to the subtracting input of the second subtracting amplifier, the summing input of which is connected to the output of the third digital-to-analog converter, the voltage input of which is connected to the input of the reference voltage of the device and the voltage inputs of the second and fourth second digital to analog converters, digital to analog converter of the fourth output connected to an input summing the first subtracting amplifier. the output of the first digital-to-analog converter is connected to the analog ί input of the scaling amplifier, the code input and output of which are connected respectively to the output of the sign of the scaling factor of the memory unit and the second input of the summing amplifier.

2. The converter according to Claim 1, wherein the comparison unit comprises two comparators, an OR element, a pulse generator and two I elements. Wherein the first and second inputs of the unit are connected to the first inputs of the first and second comparators, respectively the second inputs of which are connected to the zero input of the device, the outputs of the first and second comparators are connected to the first inputs of the first and second AND elements, respectively, and, respectively, with the first and second inputs of the OR element, the output of which is connected to the trigger input of the pulse generator, the output of which is connected to the second inputs of the first and second AND elements, the outputs of which are connected respectively to the subtraction input and the summing input of the reversible counter.