SU928354A1 - Frequency multiplier - Google Patents

Description

I

The invention relates to automation and computing and can be applied, in particular, to multiply the frequency of the pulse signals, distorted by random noise.

A frequency multiplier is known comprising a driver, a pulse generator, a frequency divider, a counter, a memory register, and a controlled frequency divider.

The disadvantage of this multiplier is its low noise immunity.

Also known is a frequency multiplier comprising a reversible counter, a digital-to-analog converter, a controlled frequency generator, and a frequency divider 2.

The disadvantage of such a multiplier is its reduced immunity.

Closest to the present invention is a frequency multiplier comprising a reversible counter connected by bit outputs to the code-frequency converter inputs, the output of which is the output of a frequency multiplier and connected to the input of a frequency divider connected by the output to the read input of a reversible counter connected by summing input to bus input multiplying frequency. Code-frequency converter

10 is performed on a binary multiplier and a reference frequency divider.

The disadvantage of this multiplier is also reduced immunity.

15

The purpose of the invention is to improve the noise immunity.

The goal is achieved by the fact that in the frequency multiplier containing the first reversible counter,

Claims (3)

1. USSR author's certificate №, cl. G About K 7/52, 1977. 2.Novitsky I.O. and others. Digital devices with frequency sensors. L., “Energie, 1970, p.300, fig. .. 3. Author's signature / USSR USSR tP 217070, cl. G About G.7 / 16, 1967 (prototype).