SU1619321A1 - Function converter - Google Patents

Abstract

The invention relates to automation and computing, in particular to hybrid devices for reproducing functions. The aim of the invention is to increase speed by applying frequency division conversion channels. The functional converter contains analog-to-digital converter 1, first 2 and second 3 digital-analog converters, 4 adder 4, block 5 of the memory of the coefficients of the approximating polynomial, multiplying the digital-analog converter 6, algebraic iJi adder 7, second 8t 2 and fourth 10 adders, first 1, second 12, third 13 and fourth 14 multipliers, inverter 15, second 16 and third 17 multiplying digital-to-analog converters, third 186 fourth 19 and fifth fifth digital-to-analog converters 20, bus 21 of the reference voltage, 1 Il. i

Description

QD WITH

N5

The invention relates to automation and computing, in particular to hybrid devices of reproducing functions.

The purpose of the invention is to increase speed.

The drawing shows the block diagram of the functional Converter.

The circuit contains analog-to-digital converter 1, the first and second digital-to-analog converters 2 and 3, the first adder 4, the first input of which is connected to the information input of the functional converter through the series-connected analog-digital 1 and the first digital-analog 2 converters, and the second is connected with this input directly, the memory block of the coefficients of the approximating polynomial 5, the first multiplying digital-analogue converter 6 and the algebraic adder 7, the first and second inputs of which are connected the outputs of the second digital-to-analog converter 3 and the first multiplying digital-analog converter 6, respectively, connected by an analog information input to the output of adder 4, the address input of block 5 is connected to the output of the analog-digital converter 1, and its first and second information outputs are connected to digital information inputs, respectively, of the first multiplying digital-to-analog converter 6 and the second digital-analog converter 3, the output of the algebraic adder 7 is the output of the function the second converter, as well as the second 8, third 9 and fourth 10 adders, first 11, second 12, third 13 and fourth 14 multipliers, inverter 15, second and third multiplying digital-to-analog converters 16 and 17, third fourth and fifth digital-to-analog converters 18- 20, the output of the first adder 4 is connected to the first inputs of the second adder 8 and the first multiplier 11 and is connected via an inverter 15 to the first input of the second multiplier 12 and to the analog input of the second multiplying digital-to-analog converter 1b connected by a digital input and output, respectively, with the third output of block 5 and with the first input of the fourth adder 10, the output of which is connected to the first input of the fourth

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The multiplier 14, fifth digital-to-analog converter 20 is connected between the fourth output of block 5 and the second input of the fourth adder 10, the second input and output of the second adder 8 are connected respectively to the bus 21 of the reference voltage and the second input of the first multiplier 11, the output of which is connected to the second input of the fourth multiplier 14 connected by the output to the third input of the algebraic adder 7, the second input and the output of the second multiplier 12 are connected respectively to the output of the first digital-analogue converter 2 and to the first input the third multiplier 13, the second input of which is connected to the output of the third adder 9, and the output is connected to the fourth input of the algebraic adder 7, the digital inputs of the third 18 and fourth 19 digital-to-analog converter and the third multiplying digital-analog converter 17 are connected, respectively, to the sixth and seventh outputs of memory block 5, and their outputs are connected respectively to the first, second and third inputs of the third adder 9, the analog input of the third multiplying digital-to-analog converter 17 is connected Inen with the information input of the functional converter.

Functional Converter works as follows.

The approximating function ((X) is, is obtained at the output of the algebraic adder 7 by adding the three components by the formula

(f (X) 4 (X;) + q (X-Xp + C.X; (X-X;) s (1) where X is the input signal supplied

to the input of the functional converter; X - low frequency component

an input signal that is inverted from the output of the first D / A converter 2; (Xx) high-frequency component

input signal at the output; inverter 15; If (X) -low-frequency component

approximating function; C (XX -) - high-frequency component | approximating function; ; C is a coefficient depending on

select the type of high-frequency

5161

component of the approximating function.

In formula (t), the three terms determine the assignment, respectively, of the three channels in the proposed functional converter, the low-frequency, high-frequency, and dynamic interpolation channels.

As a low-frequency channel for obtaining the function C) (X |), it is proposed to use a well-known functional converter in which a high-frequency input signal (XX) can be isolated.

To build a high-frequency channel C | (X-X), the function reproduced by the low-frequency channel is suggested to be conventionally approximated by a third-degree polynomial.

K (X) (KO + A (K1-KO) .X) (X-1) -X, (2) where KO, K1 and A are the coefficients of the approximating polynomial supplied from block 5.

To ensure the methodically accurate formation of power functions, in particular up to the third degree inclusive, the dynamic interpolation channel is used during transients and at high frequencies.

of The value of the coefficient C in the dynamic interpolation channel is determined with the choice of an approximating poly (2) and is obtained from the expansion of the function (p (X) in a row by the formula

Cj (x) q, (x-xj) + (p (x)) x: / 2 +

+ tf (X) X3 / 6. (3)

Senior degree X | when decomposing the functions (J) (X), the series is determined by the highest power of the chosen approximating polynomial K (X), i.e. in this case is 3.

In the formula (3), the function f (X) is approximated by the polynomial K (X) and by means of mathematical transformations the low-frequency component of the approximating function CP (X) is obtained and the value of the coefficient C is obtained, in this case equal to

.KO-2-А. () (К1-КО) -Х. (4) In statics and at low frequencies the input signal is high-frequency

five

In the case of an error at a medium frequency of the input signal, the low-frequency channel is turned off and the dynamic interpolation channel and the high-frequency channel are turned on. In this case, the power functions up to the third degree inclusive are reproduced methodically exactly.

At high frequencies, only the high-frequency channel works, and the error of the functional converter is determined by the choice of an approximating polynomial K (X), i.e. methodically accurate to the third degree inclusive.

Claims (1)

Invention Formula five 0 0 A functional converter containing serially connected analog-to-digital and first digital-to-analog converters, the first adder, the first input of which is connected to the output of the first digital-to-analog converter, the information input of the functional converter is connected to the input of the analog-digital converter and to the second input of the first-digital1 а8 а gapaichesk; ty g .- „torus, p rv'f n r second turns 1 are connected to the outputs of the coorrj eci of the second digital-and-digital“ io-3Di3OB3 bodies and the first multiplying:, nfrOschng. a log converter, an analogue information input and output of the first adder, an approximation polynomial coefficients memory block, whose address input is connected to the output of the analog-digital converter, and its first and second information inputs are connected to the digital information inputs of the first multiplying 5 pcf-channel new converter and the second digital-to-analog converter, the output of the algebraic adder is the output of the converter, rtl and given that, in order to improve speed, the second, third, fourth adders, first, second, third and fourth multipliers, inverter, second and third multiplying digits five 0 0 nal and channel of dynamic interpolation 55 analogue analogue converters, third, the error of the functional converter as a whole is also determined by the accuracy of the approximation of the low-frequency channel, i.e. in this the fourth and fifth digital-to-analog converters, the output of the first adder is connected to the first inputs of the second adder and the first multiplier the fourth and fifth digital-to-analog converters, the output of the first adder is connected to the first inputs of the second adder and the first multiplier (And through the inverter is connected to the first input of the second multiplier and to the analog input of the second multiplying digital-analog converter connected by a digital input to the third output of the memory block of the approximating polynomial, and the output to the first input of the fourth adder, the second input of which is connected to the fourth output block of the coefficients of the approximating polynomial through the fifth digital-to-analog converter; the output of the fourth adder is connected to the first input of the fourth multiplier, the second input to torogo connected to the output of the first multiplier, a second input coupled to an output of the second adder and the input of the latter connected vtoryy Kalina reference voltage, the third and fourth inputs algebraic 0 five 0 the adder is connected to the outputs of the fourth and third multipliers, the first input of which is connected to the output of the second multiplier, and the second input of the last is connected to the output of the first digital-to-analog converter, the second input of the third multiplier is connected to the output of the third adder, the first, second and third inputs respectively of the third The fourth digital-to-analog converters and the third multiplying digital-to-analog converter are connected to the fifth, sixth and seventh outputs of the memory block. approximation of the polynomial, with the analog input of the third multiplying digital-to-analog converter connected to the information input of the converter.