SU1615767A2 - Device for controlling data transmission - Google Patents

Abstract

The invention relates to automation and can be applied in devices for controlling data transmission. The purpose of the invention is to increase functional reliability by protecting against unauthorized access. The device contains registers 1, 2, 16, 31, 32, a generator of 3 pulses, element 4, groups of elements 5, 6, 7, 8, 9, 10, 11, 35, 36, 37, memory blocks 12, 34, elements OR 13, 14, 15, decoders 17, 18, 38, triggers 19, 33, delay elements 20, 21, 22, 23, 39, 40. The device, by providing protection against unauthorized access to control command transmission channels, increases functional reliability . 1 il.

Description

UNION OF THE SOVIET SOCIALIST REPUBLICS, ₁₅ , SU, _m 1615767 A 2 /

(51) 5 ^G Q8 C 19/28

STATE NOMINATION

BY INVENTIONS AND DISCOVERIES

AT SCST USSR

DESCRIPTION OF THE INVENTION

VIS90SHYA · ': “Good. J'-ΈηΑ

S A SECOND CERTIFICATE (61) * 1381569 (21) 4646464 / 24-24 (22) 12.26.88 (46) 12.23.90. Bull. No. 47 (71) Kaunas Polytechnic Institute named after Antanas Snechkus (72) V.Y. Veteris, B.V. Burgis, R.-A.V. Vetyaris and M.HiTapaHfla (53) 621.398 (088.8) (56) USSR Copyright Certificate No. 1381569, cl. G 08 C 19/28, 1986.

(54) DEVICE FOR CONTROL OF DATA TRANSFER (57) The invention relates to automation and can be used in devices for controlling data transmission. The purpose of the invention is to increase functional reliability by protecting against unauthorized access. The device contains registers 1,2,16,31,32, a pulse generator 3, an element And 4, a group of elements 5,6,7,8,9,10,11,35. 36.37, memory blocks 12.34, OR elements 13,14,15, decoders 17,18,38, triggers 19, 33, delay elements 20,21,22,23,39,40. The device, by providing protection against unauthorized access to control command transmission channels, increases functional reliability. 1 ill.

SU „, 1615767 A 2

Invention; relates to automation, in particular to devices for controlling the transmission of data, and is an improvement on the author. St. No. 1381569.

The purpose of the invention is to increase functional reliability by protecting against unauthorized access.

The drawing shows a functional jq diagram of the device.

The device contains the first 1 and second 2 registers, a 3 pulse generator, elements And 4, a second group of elements And 5-8, a first group of elements 15 And 9-11, a block 12 of read-only memory, made in the form of read-only memory, the first 13 , the third 14 and second 15 elements OR, 'the third register 16, the highest bits 20 of which are connected by a counter circuit, the second 17 and first 18 decoders, trigger 19, fourth 20, third 21, first 22 and second 23 delay elements, information 24 and address 25 25 inputs, input 26 start, synchronizing input 27 and information in outputs 28-30 devices.

The composition of the device (Fig. 1) also includes the fourth 31 and fifth 32 registers, additional trigger 33, additional memory unit 34 made in the form of read-only memory, the third group of elements And 35-37, the third decoder 38, the fifth 39 and sixth 40 elements of the \\ latch.

The drawing also shows the control inputs 41, additional synchronizing 42 and installation 43 inputs of the device.

The device operates as follows.

Before starting the operation of the device, the operator must, on the keyboard of the remote control 45 (not shown), enter a password code identifying the official who will work with this device.

The dialed password code is fed to input 41 of register 31, where it is entered by the synchronization pulse from input 42. This code is decrypted by decoder 38 and, depending on the code dialed, opens one of the AND elements. 35-37, to the other input of which is delayed by the element 39 during the transients in the register and decoder 38 the pulse from the input 42.

The pulse from the output of the element 39 for-. The holder passes through the corresponding element And 35-37 to the read input of the corresponding memory cell of the block 34 and reads its contents to the input of the register 32, where the code is entered by the pulse from the output of the delay element 40 to the synchronizing input (records) of the register 32.

In each of the fixed cells of block 34, access control words corresponding to the entered passwords are stored. Units in the corresponding categories of the word access control mean that the operator has the right to control the relevant objects, and zeros mean the prohibition of such control.

The same pulse coming from the output of the delay element 40 to the single input of the trigger 33, the last is set to a single state and with a high potential from the direct output opens the element And 4 through one of the inputs.

From now on, the device is ready for use.

Information 24 and address 25 inputs of the device simultaneously receive the information part of the message and the characteristic part of the message, which are entered into registers 1 and 2 by synchronization pulses.

The device is put into operation by applying it to input 26 ₍ start pulse, which through the OR element 15 enters the single input of trigger 19, setting the latter to a single state, trigger 19 opens high potential element And 4, and the first pulse from the output of generator 3 passes through the element And 4 and through the element 21 of the delay, the trigger 19 is reset to the initial state, and also through the element OR 13, it enters into a survey of the state of the elements And 5-8.

[If at this point in time the input message is not pos-. stupid, then in register 2 the sign of the message is zero and at the output of the decoder 17 connected to one input of the And 5 element, high potential, the opening And 5 element.

The pulse from the output of the OR 13 element passes the And 5 element and then through the OR element 15 to a single input; trshch’era 19, again translating the trigger 19 into a single state, etc.

If the message arrived in registers 1 and 2, then the decoder 17 decrypts the sign of the message address and opens one of the elements 6-8 corresponding to this sign.

Then, the polling pulse from the output of the OR element 13 passes through the corresponding open element And 6-8 and arrives, firstly, at the read input of a fixed memory cell of block 12, where the base address of the data channel through which the input message is to be switched is recorded, secondly, through the OR element 14 to the input of the delay element 22, where it is delayed by the time the base address is read from the fixed cell of block 12 and written to register 16, the high-order bits of which are connected according to the counter circuit, the recording input of which is sub li ne to the clock input device 27, which serves time pulses.

The frequency of time pulses is determined by the selected time interval. For example, for an interval of 1 hour, the number of bits in the register can be allocated to five, and every 24 hours, the five most significant bits of the register are overflowed and reset to zero.

Thus, the channel address code in register 16 consists of a base code. the code of the address received from the corresponding fixed cell of block 12, and the code determined by the state of the upper bits of the register working in counter mode.

The decoder 18 decrypts this code with a high potential corresponding to the code in the register 16, opens (the corresponding group of elements And 9-11, and a pulse from the output of the element. 22 delays the contents of the information part of the message from register 1 is transmitted to the input of the corresponding data channel to which at this time, the destination control object is connected.

Then the pulse delayed by the element 20 during the transmission of the code from register 1 to the outputs of the device, registers 1, 2 and 16 are reset. In this case, in register 16, only those bits that are reserved for storing the base address are reset to zero.

Element 23 delays the pulse from the output of element 20 until the start of the next 5 switching cycle, which begins after recording the next input message in registers 1 and 2. After this, the pulse from the output of element 23 θ through the element OR 13 is sent to the interrogation of elements And 5-8, and the message switching cycle is repeated as described.

Thus, the device provides 5 protection of access to data transmission circuits and excludes data transmission to control objects, which, in turn, improves the functional reliability of the device.

Claims (1)

0 Formula of the invention A device for controlling the transmission of data on autosw. No. 1381569, characterized in that, in order to increase functional reliability! 5 by protecting against unauthorized access, the fourth and fifth registers, the third decoder, an additional memory unit, the fifth and sixth delay elements are introduced into it _; q ki, AND elements of the third group, an additional trigger, the fourth register entry input is combined with the input of the fifth delay element and is an additional synchronizing input of the device, the information inputs of the fourth register are the control inputs of the device, the outputs of the fourth register are connected through the third decoder to the first inputs of the corresponding elements And the third group, the outputs of which are connected to the COOT— V corresponding inputs of an additional block of read-only memory, the outputs of which are connected to information 5 inputs of the fifth register, the outputs of which are connected to the third inputs of the corresponding elements of the second group, the output of the fifth delay element is connected to the second inputs of the corresponding elements of the third group directly and through the sixth delay element to the recording inputs of the fifth register and additional trigger, output the latter is connected to the third $ input of the AND element, the zeroing inputs _{f of the} fourth and fifth registers and the master trigger * are combined and are the installation input of the device.