SU1552189A1 - Device for monitoring programs - Google Patents

Abstract

The invention relates to computing and can be used in devices for debugging programs, devices for correct execution of programs. The aim of the invention is to simplify the device. The device contains a comparison circuit 4, registers of start 6, end of program 7, reference addresses 13 and error code 15, switch 5, trigger 8, decoder 9, pulse driver 10, delay element 11, group 12 of triggers, group of elements I. 1 Il.

Description

The invention relates to computer technology and can be used in devices for debugging programs, Devices for correct execution of programs.

The aim of the invention is to simplify the device.

The drawing shows a diagram of a device for monitoring programs.

The device contains address 1 and information 2 inputs, error code output 3, comparison circuit 4, switch 5, registers 6 of the beginning and 7 ends of the program, trigger 8, decoder 9, pulse shaper 10, delay element 11, trigger group 12.112.N, register 15 errors.

The device operates as follows.

I 8 the initial state in register p is the address code of the beginning of the program being monitored, in register 7 is the address code of the end of the monitored program

I of the program, and in each trigger of register 13 - the values allowed ™ (put 1) or forbidden ™ (respectively, put O) of the access of the controlled program to the corresponding blocks (zones) of memory or devices corresponding to these triggers. Switch 5 connects the register output. 6 to the input of the comparison circuit 4. The output of the T-trigger 8 low potential

At the input 1 of the device is received. Code of the address of the computer command counter (Not Proven). The value of the current code of the Address of the command counter in the scheme 4 of the equation ^ is compared with the value of the Code of the address of the beginning of the monitored program recorded in register 6. The values of the codes at the inputs of the comparison circuit 4 are the same, then a single signal appears at its output, which goes to the counting input of trigger 8 , at the output of which there appears a unit potential arriving at the control input of the switch 5, connecting register 7 to its output. The signal from the output of trigger 8 is fed to the control input of the decoder 9 and allows the receipt of block codes Cove (zones) or computer memory devices to which the currently accesses a program with input 2 -on decoder 9. Current block identification (zone) Memory device or computer is decrypted in the element 9 and sets the corresponding flip-flop 12 in the unit 'condition. In this way, the blocks (zones) of the memory or device that the program accesses during execution are fixed.

If the values of the codes at the inputs of the comparison circuit 4 coincide, which corresponds to the end of the program being monitored, then an impulse appears at its output. It arrives at the T-trigger 8, setting it to zero. The switch 5 reconnects the output to the output 6. The pulse shaper K) on the trailing edge of the pulse of trigger 8 generates a pulse that opens the block of elements And 14 at the second input. Signals at the outputs of the corresponding triggers

12.1-12.Ν enter the direct inputs of the corresponding elements AND 14.1-14.Ν. The inverse input of the element And 14.1 (i = Ι,.,. ,, Ν) comes with. i-ro of the output of register 13 is signal 1, if the controlled program can access the i-th block (zone) of memory or device, or О ’'otherwise. Therefore, if during the execution of a controlled program at least one forbidden memory block (zone) or device is used, then the corresponding element is output. And an impulse appears, which sets the corresponding register bit '15 to single; status, signaling an error when executing a controlled program, which consists in accessing an inaccessible memory block or device. If the output of 3 devices is a zero code, then there was no prohibited circulation during the execution of the controlled program.

The pulse from the output of the pulse shaper 10, lingering in the element 11, resets the triggers 12.1-12.N. The device is ready for further work.

Claims (1)

Claim A device for monitoring programs containing a comparison circuit, a decoder, a group of AND elements, a delay element and a register of reference addresses, the group of information inputs of the device connected to the group of information inputs of the decoder, the outputs of the register. The reference values are connected to the first inputs of the elements And groups, characterized in that, in order to simplify the device, it contains a switch, trig5 15 ger, registers of the beginning and the end of the program, a group of triggers, an error register and a pulse shaper, and the group of address inputs of the device is connected to the first group of inputs of the comparison circuit, the equality output of which is connected to the counting input of the trigger, the direct output of which is connected to the clock input of the decoder, with the control input of the switch, through the pulse shaper with the second inputs of the AND elements of the group and through the delay element - with zero inputs of the triggers of the group, the group of outputs of the registers of the initial and 189 6 different addresses are connected respectively to the first and second groups of information inputs of the switch, the group of outputs of which is connected to the second group of inputs of the comparison circuit, the outputs of the decoder are connected to the unit inputs of the corresponding triggers of the group, the direct outputs of the triggers of the group are connected to the third inputs of the corresponding AND elements. groups, outputs of elements AND groups are connected to the corresponding inputs of the error register, the output of which is the output of the device error code.