SU1538244A1 - Multichannel switchboard - Google Patents

Abstract

The invention relates to automation and switching technology. The aim of the invention is to enhance the functionality of a multi-channel switch, achieved by providing a free search for an information exchange unit and the possibility of exchange between more than two exchange units. The switch contains M communication control units 1, a clock pulse generator 2, counters 3 and 4, multiplexers 5-7, demultiplexers 5, 9 and 10 M switching nodes 11, N subscriber nodes 12, M-input circuit OR-HE 13, M - input circuit OR 14, N external subscriber control inputs 15, N information subscriber inputs-outputs 16, M second information inputs-outputs 17. The switch can switch any free information subscriber input-output 16 with any free second information input-output 17 . At the same time can be carried out N ( if M * 98N) or M (if N * 98M) of the subscriber information I / O connections with the second information I / O. The connection is made on the signals of the occupancy received at the external subscriber control inputs or at the external control inputs. Is performed also free search, and when receiving a call signal on I-th external control input J-th linkage control unit occurs Compound I-th subscriber information vhod00a _kc / Q _min to L / Q at a distance (L _max -L _min /) TGΑ, where

Description

19im JANSCHW P, G7

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output pulses, counters 3 and 4, multiplexers 5-7, demultiplexers 5 and 9 and 10 M switching nodes 11, N subscriber nodes 12, M-input circuit OR NOT 13, M-input circuit OR 14, N external subscriber control inputs 15, N information subscriber inputs-outputs 16, M second information inputs-outputs 17, the Switch can switch any free information subscriber input-output 16 with any free second information input-output 17 Simultaneously N (if) or M ( if N M)

1538244.4

connections of subscriber information inputs-outputs with the second information inputs-outputs. The connection is made on the signals of the occupancy received at the external subscriber control inputs or at the external control inputs. A free search is also performed, and upon receipt

JQ of the call signal to the i-th external control input of the j-block of communication control connects the 1st subscriber information input-output with the j-second second information input-output,

15 i.e. connection will be forced. 2 hp f-ly. 3 il.

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This invention relates to automation h. switching technology.

The purpose of the invention is to enhance the functionality of a multi-channel switch.

FIG. 1 shows a functional diagram of a multi-channel switch; on ig. 2 is a functional block diagram of a communication control unit; in fig. 3 - functional subscriber node scheme. I The switch contains M blocks of 1 communication control, a generator of 2 clock pulses, the first 3 and second 4 counters, the first 5, the second 6 and the third 7 multiplexers, the first 8, the second 9 and the third 10 demultiplexers, M switching nodes 11 , N subscriber units 12E, M-input element OR-NOT 13, M-inlet, and output element OR 14, N external subscriber control inputs 15, N, information information subscriber inputs-outputs 16, M second information inputs-outputs 17, M bus across N external control inputs 18, M reset inputs 19, M blocking inputs 20, N control outputs 21, out 22 resolutions and M outputs 23 occupations. The output of the clock generator 2 is connected to the clock input of the first counter 3, the first output of which is connected to the control input of the first multiplexer 5 and to the first input of all communication control blocks 1, 1st (i 1 - N) information input of all nodes 11 switching is connected to the i-th information subscriber input output 16 of the multichannel switch, and the output of the j-th (j 1 - M) switching node 11 is connected to the j-second

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information input / output 17 of the multi-channel switch. The control inputs of the second 9 and third 10 demultiplexers are connected to the control input of the first multiplexer 5 and to the first output of the first counter 3, the second output of which is connected to the clock input of the second counter 4, the output of which is connected to the control input of the first demultiplexer 8 of the second 6 and third 7 multiplexers. The inputs of the first 8, second 9 and third 10 demultiplexers are connected respectively to the outputs of the first 5, second 6 and third 7 multiplexers. The output of the i-th (i 1 - N) subscriber node 12 is connected to the i-th information input of the first multiplexer 5 and to the i-th control output 21 of the multichannel switch, the j-th output (j 1 - M) of the first demultiplexer 8 is connected to the second input of the j-ro communication control unit 1, the i-th external subscriber control input 15 connected to the first input of the 1st subscriber node 12, the second and third inputs of which are connected to the i-th outputs of multiplexers 9 and 10 respectively, je information inputs of multiplexers 6 and 7 are connected respectively to the first and second the j-ro outputs of the communication control unit 1, the third output of which is connected to the j-th input of the M-input element OR-NOT 13, the output of which is connected to the third input of all communication control units 1. The fourth output of the j-ro communication control unit 1 is connected to the j-th output 23 of the multichannel switchboard and

to the j-th input of the M-input element OR 14, the output of which is connected to the fourth input of all subscriber nodes 12 and to the output 22 of the resolution of the multi-channel switch. The fifth output of the j-ro communication control unit 1 is connected to the control input of the j-ro switching unit 11. The output of the generator 2 clock pulses is connected to the fourth input of all communication control units 1, each of which has one external input 20 of blocking, a reset 19 and N external control inputs 18.

The communication control unit 1 comprises a register 23, a comparison unit 24, a multiplexer 25, a switching unit 26, an AND element 27, an OR-HE element 28, a three-input major element 29, a zero display unit 30, the first 31 and the second 32 and the third 33 inverters. The first input of the communication control unit 1 is connected to the information input of the register 23, the first input of the comparison unit 24 and the control input of the multiplexer 25. The output of the register 23 is connected to the second input of the comparison unit 24 and to the first information input of the switching unit 26, the output of which is connected to that output of communication control unit 1 and to the input of display unit 30, the output of which is connected to the fourth output of communication control unit 1 and to the first input of AND 27 element, the second input of which is connected to the first input of the OR-HE element 28 and The second input of the communication control unit 1, the third input of which is connected to the third input of the element AND 27, the fourth input of which is connected to the output of the first inverter

31, the input of which is connected to the second input of the element OR NOT 28 and the fourth input of the communication control unit 1. The output element And 27 is connected to the clock input of the register 23, the installation input of which is connected to the output of the element OR NOT 28, the third input of which is connected to the output of the second inverter

32, the input of which is connected to the output of the comparison unit 24, the first input of the majority element 29 and the third output of the communication control block 1, the second output of which is connected to the output of the majority element 29, the second input of which is connected to the block input of the communication control block 1, the second control input block 26

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switching and to the input of the inverter 33, the output of which is connected to the first control input of the switching unit 26. The third input of the majority element 29 is connected to the reset input of the communication control unit 1, the first output of which is connected to the output of the multiplexer 25, and the switching unit 26 has a second information input.

Subscriber unit 12 contains a D-trigger 34, an AND-NO element 35, an OR element 36, and a pulse shaper 37. The direct output of the D-flip-flop 34 is connected to the output of subscriber's node 12, the first input of which is connected to the first input of the element AND-NO 35 and the input of the pulse former 37, the output of which is connected to the first input of the element OR 36, the output of which is connected to the setup input D- trigger 34, the clock input of which is connected to the output of the element IS-35, the second input of which is connected to the second input of the subscriber node 12, the third input of which is connected to the second input of the element OR 36. The inverse output of the D-flip-flop is connected to the third input of the element NAND 35, and info The D-flip-flop input is for the fourth subscriber node 12 input.

The operation of the multichannel switch is carried out in the following manner.

The switch allows you to switch any free subscriber input / output 16 with any free second information input / output 17. At the same time, N (Esp M N) or M (if H II) connections of subscriber information I / O 16 can be made with the second information inputs- 17. The connection can be made by signals from incoming calls to the external subscriber control inputs 15 or to external control inputs 18. When a call signal arrives at the i-th external subscriber control input 15, The action of the 1st subscriber information input-output 16 with one of the free second information input-output 17, i.e. a free search is made, and when a call signal arrives at the i-th external control input 18 of the j-ro communication control unit, the 1st subscriber information rc-output 16 will be connected to the j-second second information

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715382

in the exit 17, that is, the connection is forced.

In the initial state, all subscriber control inputs 15 and all external control inputs 18 have a logical 1 signal, and all other inputs of a multi-channel switch have a logical 0 signal, a multiplexer 5 controlled by a code from the JQ output of the counter 3 continuously polls subscriber units 12 for the arrival of a busy signal. Since at the outputs of the subscriber nodes 12 there are logical O signals, then at the output 5 of multiplexer 5 and demultiplexer 8, respectively, and the second input of all control units 1, the communication

Logical O signals are also present. The multiplexers 6 and 7, controlled by the code from the output of counter 4, constantly poll the communication control units 1 for incoming busy and reset signals, respectively. Since all external control inputs 18 have a logical 1 signal, the first output of communication control block 1, information inputs and output of multiplexer 6, information input and outputs of demultiplexer 9 and second input of subscriber nodes 12 also have logic 1 signals. the second output of the communication control units 1, the information inputs and the output of the multiplexer 7, the information input and the outputs of the demultiplexer 10 and the third input of all the subscriber nodes 12 present a logical O signal. Ex communication control units 1, and therefore, at the fifth data output of the blocks and control inputs of all switching nodes 11, there are logical O signals that keep switching nodes 11 in the off state. At the output of the M-input element OR 14, the fourth input of all subscriber nodes 12 and the output 22 of the resolution of the multi-channel switch, a signal of logical 1 is present.

Example. Switching the 1st subscriber information input-output-16 with the j-second second information input-output 17 according to the busy signal received at the i-th subscriber control input 15.

Upon receipt at the i-th subscriber control input 15 of the logical signal O at the output of the element AND-NOT 35,

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consequently, a positive voltage drop appears at the clock input of the trigger 34 of the 1st subscriber node 12, which sets the trigger 34 to a single state. The logical 0 signal from the inverse output of the trigger 34 of the 1st subscriber node 12 blocks the operation of the NAND element 35 of the same subscriber node 12. The logical 1 signal from the output of the 1st subscriber node 12 goes to the i-th information input of the multiplexer 5 and ii i control output 21. When the code of the number is at the control input of multiplexer 5, then a logic signal 1 appears at its output and at the input of the demultiplexer 8.

Let the code of j be present at the control input of the demultiplexer 8 at this time. The signal of logical 1 from the j-ro output of the demultiplexer 8 is fed to the second input of the j-ro of the communication control block 1. Further, this signal is fed to the second input of the element AND 27 and the first input of the element OR-NOT 28 j-ro of the communication control unit 1. Since the output of the register 23 of this communication control block 1 contains logical O signals, the output of the zero indication block 30 and the first input AND 27 j-ro of the communication control block 1 is a logical 1 signal, and at the third input of the AND 27 element the signal is logical 1 from the output of the element OR 14, since at this time the signal of logical 0 from the outputs of blocks 24 compare all blocks 1 of the communication control is present at all its inputs. This signal indicates that the code of the number j, and therefore the j-second second information input-output 17 is not entered into any of the registers 23 of the communication control block 1.

Upon the arrival of the second half cycle of the clock pulse (logical O) the positive voltage drop appears at the input of the first inverter 31 of all communication control blocks 1 at the output of the element 27 and the clock input of the register 23 j-ro of the communication control block 1, which records The given register is the code of j. Further, this code through the switching unit 26 is fed to the input of the zero display unit 30 and the control input of the j-th switching unit 11. The logical signal from the output of the block 30 display zero j-ro unit 1 control915382

linking blocks the operation of the AND element 27 of this communication control unit 1 and enters the j-th occupancy output of the multi-channel switch, and the j-th switching node 11 connects the i-th subscriber information input-output 16 with the j-second informational input-output 17.

Similarly, JQ is connected between other free subscriber information inputs-outputs 16 and second information inputs-outputs 17. When such connections become M, all blocks 1 of the control OR-NOT 28 j-ro of the control block 1 are occupied and a pa of the output of the OR element 14 a logical O signal appears, which is fed to the fourth input of all subscriber nodes

a signal at the output of this element and the installation input of the register 23 is a logical signal 1, which sets this register 23

12, blocking the rest of the trigger-20 operation to its original state. On the fifth view 34. The same signal arrives at the output 22 of the resolution of the multichannel switch and indicates that it is impossible to establish more connections at this time due to the absence of free communication control units 1, switching nodes 11 and second information inputs exits 17.

The connection of the 1st subscriber information input-output 16 with the j-second second information input-output 17 is performed until the signal appears at the i-th subscriber control j-ro of the communication control unit 1 logical O, which turns off the j-th communication node 1 1, and the i-th subscriber information 25 input-output 16 and the j-second second information input-output 17 are released.

Disconnection of the 1st subscriber's information input-output 16 by the 30th jth second informational input-output 17 when the input of the i-th subscriber control input of the logic 1 signal (disappearance of the signal

Disconnection of the 1st subscriber information input-output 16 from the 30th jth second informational input-output 17 when the logical input 1 is received at the i-th subscriber control input (signal disappearance

The first input signal (15) (the signal disappears) or by the display. This signal triggers the formation of a reset signal (logic logic 3 pulse which is being developed 11) at j-th reset input 19, or p | p, ™, ™ r „p ™„ „., - blocking signal (logical O) to j-th blocking input 20 is galvanized by a short pulse (logical 1) of resetting trigger 34 to its initial state and at the output of 1st subscriber node 12 a logical O signal appears. Further disconnection of the j-ro connection of the subscriber information input-output 16 and j-th second data input-output 17 is similar.

40

national switch.

If the j-th input 19 of the reset receives a logical 1 signal, then the connection of the 1st subscriber information input-output 16 and the j-ro of the second information 45 input-output 17 is disconnected while the code on the first output of counter 3 corresponds to the number i, and the code at the output of the counter 4 - the number j. At this time, a logical 1m signal appears at the output of the j-ro comparison block 24 of the communication control block 1, since the codes on both inputs of this block are equal (correspond to the number 1). At the output of the majority element 29, and therefore $$ ", the second output of the j-ro of the communication control unit 1 is a logical 1 signal. Then this signal is through multiplexer 7 and demultiplexer 10 through 10

steps to the third input of the 1st subscriber node 12. At the output of the OR element 36 and the installation input of the trigger 34 of this subscriber node 12, a signal 1 appears, which resets the trigger 34 to the zero state and at the output of the 1st subscriber node 12 is a signal of logical O. This signal through multiplexer 5 and demultiplexer 8 is fed to the second input of j-ro communication control unit 1. With the arrival of the second half cycle of clock pulse to the second input of the element OR NOT 28 j-ro control unit 1

a signal at the output of this element and the installation input of the register 23 is a logical signal 1, which sets this register 23

in the initial state. On the fifth you

During the j-ro of the communication control block 1, a logical O signal appears, which turns off the j-th switching node 1 1, and the i-th subscriber information input / output 16 and j-th second information input / output 17 are released.

Disconnection of the 1st subscriber information input-output 16 with the j-second second information input-output 17 when the logical signal 1 signal arrives at the i-th subscriber control input (signal disappearance

occupation) occurs as follows p | p, ™, ™ r „n ™„ „, .-

A short pulse (logical 1) of resetting the trigger 34 to the initial state and at the output of the 1st subscriber unit 12 appears a logical signal O. Further disconnection of the j-ro subscriber information input-output 16 with the j-second second information input- Exit 17 is similar.

When a logical 1 (blocking signal) signal arrives at the jth blocking input 20, this signal is fed to the second input of the majority element 29, the inverter input 33 and the second control input of the junction block 26 of the j-ro communication control unit 1. The second information input of the switching unit 26 of all communication control units is permanently connected to the code of a number greater than N. The switching unit 26 of the j-ro communication control unit 1 disables the code from the output of the register 23 and switches the code from the second information input to the block input 30 zero display and

to the fifth output of the communication control unit 1. At the output of the indication block 30, a logic signal O appears and blocks the operation of the element 27 And this signal indicates that the j-th communication control block 1 is occupied. The code from the fifth output of this communication control block 1 goes to the control The j-ro of the switching node 11 enters and keeps it in the off state for the entire duration of the blocking signal. When the code on the first output of counter 3 corresponds to the number i, a

at the output of counter 4 - the number j, on

the third, and correspondingly, the second output of the j-ro of the communication control block 1 is a logical 1 signal. Next, the connection is broken between the i-th

subscriber information input-in the course of 16 and the j-second second information input-output 17 is similar.

The connection of the 1st subscriber information input-output 16 with the j-second second information input-output 17 can occur according to a busy signal (logical O) received at the i-th input of the j-th external control bus (input 18). This signal is fed to the i-th information input of the multiplexer 25 of the j-th communication control block I. When the code at the first output of counter 3 corresponds to the number i, and the code at the output of counter 4 to the number j, this logical O signal has passed through the multiplexer 25 j-ro of the communication control unit 1, multiplexer 6 and the 9H multiplexer is fed to the second input 1 subscriber node 12. At the output of the IS-HE element 35 of the subscriber node 12, a positive differential sets the trigger 34 to a single state, and the output of the 1st subscriber node 12 is a logical 1 signal. Then the connection 1 of the subscriber information input-output 16 with the j-second second information input home-exit 17 occurs similarly.

In the case of the arrival of the occupation signal on the i-input of the K-th external control bus and the employment of the 1st subscriber information input-output 16, the connection does not occur, since in the register

23j-ro of the communication control unit 1 the code of the number i is entered. Therefore, the block

24Comparison of j-ro control

12

the connection prohibits the writing of the code of the number i in the remaining registers.

The proposed switch allows simultaneous information exchange in M directions between any of the M information exchange units and M of the N communication lines. The switch performs a free search mode, it is possible to switch not only by a call signal received from the communication line, but also by a call signal received from information exchange units, and a blocking of information exchange units is also provided. These benefits extend the functionality of the multi-channel switch.

Formulas

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Claims (3)

1. A multichannel switch containing a clock generator, a first counter, a first multiplexer, a first demultiplexer, blocking inputs and an OR element, the output of the clock generator connected to the clock input of the first counter, the first output of which is connected to the control input of the first multiplexer, differing in that, in order to extend the functionality, M is introduced into it by the communication control unit, the second counter, the second and third multiplexers, the second and third demultiplexers, the node Utsiya, subscriber node, element OR-NOT, element OR N external subscriber control inputs, N information subscriber inputs-outputs, M second information inputs output, M reset inputs, M bus on N external control inputs, N control outputs, output permission and M of the outputs of the load, the first output of the first counter is connected to the first input of all communication control units, the i-th (i 1 - N) information input of all switching nodes is connected to the i-th information subscriber input-output of the multi-channel switch, and j output ro (j 1 - M) of the switching node is connected to the j-th second information input-output of the multichannel switch; moreover, the control inputs of the second and third demultiplexers are connected to the control input of the first multiplexer, the second output of the first counter is connected to the clock input of the second counter 13 153 ka, the output of which is connected to the control inputs of the first demultiplexer, second and third multiplexers, the inputs of the first, second and third demultiplexers are connected respectively to the outputs of the first 1, second and third multiplexers, output i-th (i 1 - N) subscriber node is connected to the i-th informational JQ element input for it, the fourth input the first multiplexer input and the 1st control output of the multichannel switch, the jth output (j 1 - M) of the first demultiplexer is connected to the second input of the j-ro communication control unit, and the i-th external subscriber control input is connected to the first the input of the 1st subscriber node, the second and third inputs of which are connected to the i-th output of the second and third demultiplexers, respectively, the i-th information input of the second and third multiplexers, respectively, connected to the first and second outputs of the j-ro communication control unit, third in turn is connected to the j-th input of OR-NO element whose output is connected to the third input of the control blocks bond, the fourth output of the j-ro control unit 30 to the control input of the switching unit, 3 connected to the j-th output of the multichannel switch and the j-th input of the OR element, the output of which is connected to the fourth input of all subscriber nodes and to the output of the resolution of the multichannel switch, the fifth output of the j-ro communication control unit is connected to the control to the j-ro input of the switching node, the output of the clock generator is connected to the fourth input of all communication control units that have external blocking inputs. 2. A switch according to claim 1, characterized in that the communication control unit comprises a register, a comparison unit, a multiplexer, a switching unit, an AND element, an OR-NOT element, a three-input majority element, a zero indication unit, the first, second and third inverters, the first input of the communication control unit is connected to the information input of the register, to the first input of the comparison unit and to the control input of the multiplexer, the output of the register is connected to the second input of the comparison unit and to the first information input of the switching unit whose output is connected n to the fifth output block five 14 control unit and to the input of the display unit zero, the output of which is connected to the fourth output of the communication control unit and to the first input of the AND element, the second input of which is connected to the first input of the OR control element, and the third input of connected to third 0 5 which is connected to the output of the first inverter, the input of which is connected to the second input of the element OR NOT and the fourth input 6j, communication control OKa, 5 output of the element AND is connected to the register clock input whose setting input is connected to the output of the element OR NOT, the third the input of which is connected to the output of the second inverter, the vrsod of which is connected to the output of the comparison unit, to the first input of the majority element and to the third output of the communication control unit, the second output of which is connected to the output of the majority element, the second input cat This is connected to the blocking input, to the second control input of the switching unit and to the input of the third inverter, the output of which is connected to the first five  ,, - 0 the third input of the majority element is connected to the reset input of the communication control unit, the first output of which is connected to the multiplexer output, the information inputs of which are external control inputs of the multi-channel switch, the switching unit having the second information input. 3. The switch according to claim 1, about tl and h ayu yi and the fact that the subscriber node contains a D-flip-flop, an element AND-IE, the element OR, a pulse shaper, and the direct output of the D-flip-flop is connected to the output of the subscriber node, the first input of which is connected to the first input of the NAND element and to the input of the pulse shaper, the output of which is connected to the first input of the OR element, the output of which is connected to the D-flip-flop setup input, the clock input of which is connected to the output of the NAND element whose second input is connected to the second input of the subscriber node, third whose input is connected to the second input of the OR gate, inverted output D-flip-flop is connected to the third input of the NAND gate NG and the information input of D-flip-flop - a fourth input of the subscriber uep.ch.