SU1534485A1 - Device for training operators - Google Patents

Abstract

The invention relates to the technical means of training operators and can be used in simulators for training control system operators. The purpose of the invention is to expand the didactic capabilities of the device. The device additionally contains the fourth element OR 20, the third trigger 21, the element 22, the second counter 23, the first 24 and second 25 number registers, the third block 26 of the comparison, the fourth 27, the fifth 28, the sixth 29 and the seventh 30 delay elements and the driver 31 pulses to control the audible alarm. The device also contains the address register 1, memory block 2, micro-command register 3, information board 4, operator response input block 5, comparison block 6, element OR 7, delay element 8, element OR 9, trigger 10, generator 11, element 12 inhibitions, a counter 13, an element OR 14, a delay element 15, a comparison block 16, a trigger 17, a sound alarm block 18 and a delay element 19. The device makes it possible to increase the efficiency of operator training at the timeliness of both individual operations and the activity algorithm as a whole by promptly presenting the student with information on increasing or decreasing the temporary "deficit" when executing control algorithms. 1 il.

Description

The invention relates to the technical means of training operators and can be used in simulators to train control system operators.

The purpose of the invention is to expand the didactic capabilities of the device with an increase in the efficiency of operator training in timely actions when executing control algorithms.

The drawing shows the functional diagram of the device.

The device contains a microcommand address register 1, microprogram memory block 2, microcommand register 3, information board 4, block 5 — operator response actions, block 6 comparison, element SHI 7, delay element 8, element OR 9, , generator 11 clock pulses, el & ban 12, counter 13, element OR 14, delay element 15, comparison block 6, trigger 17, sound alarm block 18 delay element 19, element OR 20, trigger 21, AND element 22, counter J23, number registers 24 and 25, comparison block 26, delay element 27, delay elements 28-30 and pulse shaper 31 to control the audible alarm.

Register 1 is intended for storing data about the control component of the operator activity algorithm. Register 1 stores in the addresses of microinstructions (in block 2 of the microprogram memory) corresponding to the operations of the algorithm. Register 1 has as many cells as there are operations containing an activity algorithm, plus one cell that records the time when the algorithm is completed. When a signal appears on one turn of register 1, the first microcommand mic5 is selected.

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programs corresponding to the first operation of the control algorithm. With the arrival of the signals pa each -H, the input of the health register 1 is done and the next microcommand of the microprogram corresponding to the next operation of the algorithm is read.

Boc 2 serves to store the parameters of the algorithm of activity. Block 2 stores a series of microprograms, microcommands corresponding to the operations of the operator's operations.

Register 3 pr ,. assigned for short-term storage of parameters of the current operation of the operator's activity algorithm. Each microinstruction consists of three microoperations, in the first one: which stores the code of the organ of information board 4, which changes the state of the operation in this operation, in the second microoperation there is the organ code of unit 5, and in the third - the time code assigned for the operator to perform all previous on this operation of the algorithm of activity. The content of the first micro-operation, via the first outputs of the register 3, is fed to the inputs of the information board 4. The code from the second micro-operation, via the second outputs of the register 3, is transmitted to the inputs of the comparison unit 6, and the information from. the third micro-operation of the micro-command enters the third outputs of the register 3 at the inputs of the unit 1 of the comparison.

The information board 4 and block 5 are the Physical modem of the operator’s console at his workplace when the tasks of controlling objects are performed.

Unit 6 is designed to assess the accuracy of the operator’s actions by comparing the codes of the required organization, 51534485

on block 5, involved by the operator, entering the inputs of block 6.

The OR 7 and 8 delay elements synchronize the moments of reading the contents of the second micro-operation of the microcommand from register 3, as well as the comparison in block 6 o

The trigger 10 serves to organize an interruption in the operation of the counter 13 for the time of reading information from it.

Generator 1 1 is intended for; representing the time value of the operator's actions to perform operations of the algorithm — into the code, the first input of the generator 1 — to stop it, and the second — to start.

The counter 13 is designed to count the number of pulses produced by the generator 1I during the time elapsed from the beginning of the workout (starting the device} to the execution of the current operation of the algorithm.

Block 16 is designed to compare the time spent by the operator to perform all operations, including the current one, from the beginning of the workout, with the reference time value

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Delay elements 19-30 are for synchronizing the operation of the device circuit.

Shaper 31, depending on the result of the comparison in block 26, produces an increase in the frequency of the sound signal of block 18, if the time taken by the operator to perform the current operation is greater than the time spent on the previous operation. In the event that this time is less than the time spent on performing the previous operation, the imaging unit 31 generates a signal to reduce the frequency of the sound.

The device operates as follows.

When the device is turned on, the input of register 1 receives a signal from the external input 32 of the device when it starts. This signal is used to start the generator I1 and select the microcommand in block 2, which corresponds to the first operation of the algorithm.

25 The contents of this microcommand from block 2 are rewritten into register 3, which leads to the appearance of signals at its first outputs. This signal is fed to the trigger input 21 and

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to perform these operations in accordance with the input of the board 4, a change in the state of its corresponding organs.

The human operator, perceiving this information, acts on the organ of block 5. The code of the organ involved enters the inputs of block 6, and through the element OR 7 the signal arrives at the input of register 3 and element 8. According to this signal, the contents of the second micro-operation at the outputs of register 3 enters the input of block 6, and the comparison signal is fed to the input of block 6 from the output of element 8.

The provision with a temporary standard.

The trigger 17 controls the starting and stopping of the block 18, which informs the learner about the time deficiency, i.e. its remaining from the reference timeline. At the same time, after the launch of block 18 due to the appearance of a signal at its first input. the frequency of the sound can either increase, if the deficit increases, or decrease otherwise, due to the occurrence of signals at its second and third inputs, respectively.

A trigger 21 controls the activation of a counter 23, which counts the time taken by the operator to perform the current operation.

Register 24 stores the number counted by counter 23 for later comparison in block 26.

Register 25 is intended to store the time code spent by the operator to perform an operation prior to the current operation.

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The pulses produced by the 45 ROM 11 generator, after the change in the state of the organs of the board 4, go through element 12 to the input of the counter 13, which calculates the time spent by the operator for performing all operations of the algorithm. In addition, the pulses from the output of the generator 11 are fed to one input of the element And 22, at the other input of which there is a signal from the direct output of the trigger 21 in the flow

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Delay elements 19-30 are for synchronizing the operation of the device circuit.

Shaper 31, depending on the comparison result, in block 26 produces an increase in the frequency of the sound signal of block 18, if the time taken by the operator to perform the current operation is longer than the time spent on the previous operation. In the event that this time is less than the time spent on performing the previous operation, the imaging unit 31 generates a signal to reduce the frequency of the sound.

The device operates as follows.

When the device is turned on, the input of register 1 receives a signal from the external input 32 of the device when it starts. This signal is used to start the generator I1 and select the microcommand in block 2, which corresponds to the first operation of the algorithm.

5 The contents of this microcommand from block 2 are rewritten into register 3, which results in the appearance of signals at its first outputs. This signal is fed to the trigger input 21 and

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The pulses generated by the generator ROM 11, since the change of the state of the organs of the board 4, go through the element 12 to the input of the counter 13, which calculates the time spent by the operator for performing all operations of the algorithm. In addition, the pulses from the output of the generator 11 are fed to one input of the element And 22, at the other input of which there is a signal from the direct output of the trigger 21 in the flow

Block 26 is used to compare the time of the entire execution time of the current menu spent by the operator on you algorithm operations. The passage element completes the current operation, with time, and 22, the pulses are counted by the counter when it is executed, com 23, which corresponds to the time of the previous operation spent on the operation.

If the operator admits an error of coincidence, the codes received at the inputs of the comparison unit 6 will not occur and there will be no signal at its output. If the operator has performed the required action correctly, then at the output of block 6, the VITS signal that goes to the input of the trigger 21 and to the input of the element OR 9, which will lead to the termination of the first 13 and second 23 counters. In addition, this signal, having entered the input of register 3, will lead to the reading of the time code allotted to perform this and all previous operations, via its third outputs to the inputs of block 16, and, finally, this signal will go through element 19 to the input of register 1 to select the next operation of the algorithm. In addition, the signal from the output of the element OR 9 is fed to the input of the trigger 10, which is fed to the input of the element 12 and closes it, to the input of the trigger 10 and to the control input of the counter 13. By this signal the counter is reset, and its contents are rewritten to block 16. The contents of the third microoperation of register 3 are copied to the other inputs of block 16. The signal for comparison comes from the output of element 15. If, as a result of the comparison, the time taken for the operation of the algorithm is less than the reference, then the signal is present at the first output of block 16 and trigger input 17. Otherwise, the signal on Wits on the second output of block 16, which is connected to another input of trigger 17, and this, in turn, will lead to the start of block 18.

The signal from the output of block 6 goes to element 27, from the output of which o is fed to the control input of counter 23, which calculates the time taken to perform the current operation, and to element 28. The contents of counter 23 are written to register 24 o. element 28 zeroes the contents of reader 7.3, and the contents of register 25 is rewritten into block 26. The signal from the output of element 29 enters the input of register 24 and rewrites its contents into block 2 and into register 25. The signal for checking the incoming codes arrives from the output of element 30 . In the first operation of the matching algorithm,

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there will be no codes, because in this case O is written in register 25, therefore there will be no changes in the state of block 18.

When performing the second operation of the algorithm, the device operates in the order described, i.e., if, as a result of the comparison, in block 16 it turns out that the time spent on the first and second operations of the algorithm is greater than the reference value of the time allotted for performing these two operations , the signal will be present at the output of block 16, the ac signal is fed to the input of the trigger 17, the unit output of which leaves the block 18 turned on. Otherwise, the signal is received at the first output of the block 16 and goes to the input of the trigger 17, turning off it cas-th unit 18.

Thus, block 18 is turned on or off as a result of a comparison of elapsed time and reference time during the execution of an upgrade on each operation of the algorithm. The control of the frequency of the sound of the block 18 is made according to the results of comparing the values of the time spent on the current and previous operations of the algorithm. These values are stored in registers 24 and 25, respectively, and are sent for comparison to block 26. If the time for the current operation is longer than the previous operation, this means that the operator’s time deficit increases and the signal from the output of block 26 goes to the first input of the imager 31 and from it to the second input of block 18, which leads to an increase in the frequency of the sound device. Otherwise, when the operator began to work faster and liquidates the existing deficit, the signal is scanned at the second output of block 26 and goes to the second input of the imaging unit 31. From the output of the latter, a signal is sent to the third input of block 18 to reduce the device’s sound frequency.

The proposed device expands the didactic capabilities of the simulator for training operators at the stage of working out the timeliness of performing both individual operations and the algorithm of activity as a whole by promptly presenting information to the learner about increasing or t reducing the time deficit for

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performing the remaining operations of the algorithm.

Claims (1)

Invention Formula A device for training operators, containing the address register, the setup input of which is the device input, and the group outputs are connected to the corresponding inputs of the memory unit, the outputs of which are connected to the corresponding information inputs of the microcommand register, the outputs of the first group of which are connected to the corresponding information board inputs , the outputs of the second group to the corresponding inputs of the first group of the first comparison unit, and the first control input to the output of the first ale. OR connected to the input of the first delay element, the output of which is connected to the control input of the first comparison unit, the output of which is connected to the input of the second delay element, and the inputs of the second group to the corresponding outputs of the input unit of the operator response actions and the corresponding inputs of the first element OR, the first trigger, the R-input of which is connected to the output of the second element OR, the first counter, the outputs of which are connected to the corresponding inputs of the third element OR and with the corresponding information by the moves of the first group of the second comparison unit, the first and second outputs of which are connected to the R- and S-inputs of the corresponding second trigger, the single output of which is connected to the first input of the audible signaling unit, the information inputs of the second group of the second comparison unit are connected to the corresponding outputs the third group of the micro-command register, and a triggering trigger to the output of the third delay and the input of the seventh element second delay, the input of which is from e; l-1nen to the output of the third element OR, the single output and the S input of the first trigger are connected to the installation input of the first counter and the control of the prohibition, the output of which is cot-dined with the information counter of the first counter, and the information the input is with the generator output, the start-up input of which is connected to the installation register of the address register, 0 five Q Q and the stop input is connected to the overflow output of the address register and the first input of the second OR element, the second input of which is connected to the output of the first comparison unit connected to the second control input of the microcommand register, the output of the second delay element is connected to the information input of the address register, characterized in that , in order to expand the didactic capabilities of the device, the fourth element OR, the third trigger, the AND element, the second counter, the first and second number registers, the third comparison block, the fourth, the fifth, estoy and seventh delay elements and pulse generator, first and second outputs which are respectively connected to second and third inputs of the audio signaling unit and the first and second input - with corresponding output of the third comparison unit 5 Neny, data inputs of the first and second groups of which are connected. respectively, to the outputs of the first and second number registers, and the control input to the output of the seventh delay element, the input of the fifth delay element is connected to the output of the fourth delay element and the control input of the second counter, and the output to the input of the sixth delay element controlling input the second register number and the setup input of the second 0 five the counter, whose information input is connected to the output of the I element, and the outputs to the corresponding information inputs of the first number register, the outputs of which are connected to the corresponding information inputs of the second number register, and the control input with the output of the sixth element delay, the input of the fourth delay element is connected to the output of the first comparison unit and the R input of the third trigger, the output of which is connected to the first input of the AND element, and the S input to the output of the fourth OR element, whose inputs are connected to the corresponding outputs of the first group of microcommand, the second input element And is connected to the output of the generator.