SU1529210A1 - Information input device - Google Patents

Abstract

The invention relates to computing and can be used to manually enter information into a computer. The aim of the invention is to expand the field of application of the device. The device contains a pulse generator 1, a counter 2, a first multiplexer 6, a capacitive matrix keyboard 5, a strobe driver 7, a decoder 4, a second multiplexer 9, a threshold amplifier 10, a demultiplexer 11, an integrator driver 12. A binary information code is generated using the first group of keys , and with the help of the second group of keys - the position code. The device makes it possible to record the simultaneous pressing of at least two function keys of the second group. 3 il.

Description

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The invention relates to the field of automation and computer technology and can be used to manually enter information into a computer.

The aim of the invention is to expand the field of application of the device by forming position codes simultaneously pressing the function keys.

FIG. shows the functional diagram of the device; in fig. 2 - time diagrams that show his work; in fig. 3 is an example of a specific technical implementation (schematic diagram) of the device.

FIG. 1 denotes a pulse generator i, a counter 2, a device binary code 3 outputs, a deQJ driver 4, a capacitive matrix keyboard 5, a first multiplexer 6, a gate driver 7, a strobing output 8 of the device, a second m. 1L-type 9, a threshold amplifier 10, the multiplexer 11, the integrator-driver 12, the outputs 13 of the position code of the device.

The device works as follows.

Signals (Fig. 2a) from the generator output are sent to the clock input of counter 2. The lower digits of the counter 2 code of degaphiftorator 4 are converted to an imp; the keypad 5 polling sequence is delayed relative to the generator and pulse of the generator 1 at time t. : p determined by the delay of counter 2 and decoder 4. The output sigpaly keyboard 5 is formed as a result of differentiation of the output pulses of the decoder 4. The ratio of sensor capacitances when pressed and to the parasitic capacitance of the sensor 1) 1

.lt noise immunity (Fig. 2a).

The signals from the outputs of the columns of the keyboard group 5 are fed to the information inputs of the mult; Ekora 6, which in turn selects one of 2 columns. (from the output of the multiplexer 6 is fed to the input of the generator 7. The pulse at the output 8 of the generator 7 (Fig. 2d) can be used to write a binary ("+ /.)") bit code into the buffer device (RAM, register, etc. .). The second multi-type. 1x 9 selects alternately, in accordance with the code established on the address inputs, one of the 2 columns of the second keyboard group 5 outputs. A pulse signal from the selected column is fed to the input of the threshold amplifier 10. When the reference voltage is exceeded at the output of the threshold amplifier 10 (and this occurs at the moment of polling the sensor of the pressed key) a pulse of duration m "is formed (fig. 2d). The duration m is due to the time that the pulse signal exceeds the level of the reference voltage and

determined by constant

where R, i.

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input impedance threshold amplifier. To fix at least two keys pressed simultaneously, the following condition must be met.

 T 1

where T is the period of the following pulses oii |) osa (Fig. 2a).

The pulse sequence from the output of the threshold amplifier 10, synchronous with the pulse generator 1, is fed to the input of the demultiplexer 11. In accordance with the code of the key pressed, the pulse sequence (Fig. 2) with the period following 1. T.,

The pulse sequence from the output of the demultiplexer I is fed to the output generator. 12, which integrates the input sequence, and the integration is constant up to; there can be more than a period T, as well as more bounce time when pressing and releasing the key.

Thus, using a single matrix of capacitive sensors, a binary code with a strobe signal from the first group k can be generated at the output of the proposed device. The first key and the position code for the second functional group of keys are possible, and the key can be fixed as two keys are pressed simultaneously. second group.

The input device of the capacitance-Hoi o type can be made, for example, as shown in FIG. 3

Generator I is made on Schmidt D1.1 and D1.2 triggers and generates a frequency of 100 kHz. Counter 2 is made on synchronous series-connected counters Z16, D7, forming 6-bit: 1st binary information K (.) D. The gated decoder 4 is implemented on the DZ IC, the control inputs of which are supplied with 3 small bits of the binary code that allows gating of the rows of the capacitive matrix 5. The capacitive matrix 5 has 8 rows and can have up to 8 columns of the first group of keys and up to 8 columns second group of keys. The first multiplexer is implemented on the D2 trigger, on the 7th and 3rd inputs of which three higher bits of the binary code are applied, allowing you to select up to 2-8 columns of the first group of Keys. Formed, ab 7 gating pulse is implemented on the amplifier I T1 and the comparator D8. The threshold voltage level is selected by the resistance P5, and the output level of the gate signal is 8 and corresponds to the logic levels.

TTLSH-logic. The second multiplexer 9 is implemented similarly to the first on the IC D4 and also allows you to select up to columns of the second group of keys. The threshold amplifier 10 is implemented similarly to the gate pulse shaper 7. The demultiplexer 11 is implemented on the basis of the D5 strobe decoder, having 8 output channels. By increasing the demultiplexer 11, you can receive up to .64 channels in a variant of a specific implementation. The output driver 12 consists of an integrator, built on a transistor VT3, a capacitor C4, resistance RB, and a level D9 coparator, which forms the output signal. In the initial state, the C4 capacity is charged up to the power supply voltage and at the output of the comparator, which has a release threshold of 2.5 V for CMOS K561LN2 IC, there is a level "O. When a negative pulse arrives, transistor VT3 opens and capacitor C4 discharges through an open transistor to a voltage of 0.4 - 0.5 V. At the end of the pulse, the capacitor starts to charge through resistor P6. The charge time is determined by the constant charge. The input impedance of the comparator, made on a CMOS IC, can be neglected, since it is 5 MΩ. In the example of a specific implementation of kOhm, nF, ms. The period of the following pulses is 10 µs, and the protection time for contact bounce is 1-2 .ms. In a particular implementation, when the key was pressed at the input of the corresponding comparator, the signal level did not exceed 0.7-0.8 V, which was perceived as "O, and the level of the generator was set to" 1. Similarly built all the output shapers. As the main element base, ICs of medium integration with Schottky K555 series diodes are chosen. The first and second multiplexer level comparators in the output shapers are implemented on

CMOS IC series K561. Transistors of type KT3102B, transistors VT3-VT10 of type KT3107I.

Claims (1)

Invention Formula An information input device comprising a pulse generator, a counter, a first multiplexer, a capacitive matrix keyboard and a gate driver, the output of which is the gate output of the device, the output of the pulse generator is connected to the clock input of the counter, the outputs of which are outputted by the binary code of the device, the outputs of the higher bits of the counter are connected to the address inputs of the first multiplexer, the output of which is connected to the input of the gate generator, the outputs of the columns The first group of capacitive matrix keyboard is connected to the information inputs of the first multiplexer, characterized in that, in order to expand the area of the device changes by forming Hovhan positional codes simultaneously pressing the function key, the device comprises a decoder, a second multiplexer, threshold the amplifier, the demultiplexer and the integrator, whose outputs are the outputs of the position code of the device, the low-order outputs of the counter are connected to the information inputs of the decoder, the outputs of which are connected to the inputs of the capacitive keyboard strings, the strobing input of the decoder is combined with the clock input of the counter, the outputs of the columns of the second group of capacitive matrix keyboard are connected to the information inputs of the second multiplexer, the address inputs of which are combined with the address inputs of the demultiplexer and the address with the primary inputs of the first multiplexer, the output of the second multiplexer is connected to the input of the threshold amplifier, the output of which is connected to the information input of the demultiplexer, the outputs of which are connected to the inputs of the integrator. y & -n JTJi; - ij; Tj-i