SU1525696A1 - Multichannel device for input of information - Google Patents

Abstract

The invention can be used in input devices in a computer. The purpose of the invention is to expand the scope by controlling the duration of the output pulses. The information in each channel comes through information inputs 3 to the input of the first triggers 1, where it is memorized, and the clock pulse from the synchronization input 8 from some programmable using the counter 12, the code setting inputs 15 and the comparison block 14 is rewritten into the second trigger 2 and is located at the outputs 4 and 5 of the device The duration of the information on the outputs of the device is programmed by means of a counter 7, inputs 10, a code setting, and a comparison block 9. 1 il.

Description

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The device relates to automation and computing technology and can be used in input devices (|| form in a computer.

The purpose of the invention is to expand the field of application of the device due to the possibility of controlling the efficiency of the output pulses.

The drawing shows a structural diagram of a multi-channel information input device.

| The device contains in each channel triggers 1. And 2, information input 3 outputs 4 of the first group, outputs | 5 of the second group, as well as the first element OR 6, first counter 7, VH0D 8 synchronization of the device, first Bbttf block 9 compare; inputs 10 task- ksh. code, element 2I-NOT 11, second 12, element 2I 13, second comparison block 14, inputs 15, the code and the second element OR 16, the first triggers are information inputs 3 of the device direct outputs of the first triggers 1 (|: With the J inputs of the respective second flip-flops 2, the forward outputs of which are the information outputs 4 of the first device group, the inverse outputs of the second flip-flops 2 connected to the R inputs of the corresponding first triggers are connected to the information outputs 5 of the second group of the device and connected to the appropriate entry The first element OR 6, the output of which is connected to the R input of the first counter 7, the input of which is connected to the synchronization input 8 of the device, and the outputs are connected to the inputs of the first group of the first comparison block 9, the inputs of which are input D4MI.10 set the code, and the output is connected to the first input of the element 2И-НЕ 11, the second input of which is connected to the synchronization input 8 of the device, the C input of the second counter 12 and the first input of the element 2И 13, and the output soy jnen with the R inputs of the second flip-flops 2, j C-inputs of which are connected to the output of element 2I 13, second MDM second input connected to the output of the second comparator unit 14, the inputs of the first group 15 which inputs specifying code, and a second group of inputs connected to the outputs of the second counter 12, R- poklyuchek input thereof to the output of the second OR gate 16, whose inputs are

connected to the inverse outputs of the respective first triggers 1,

The device works as follows.

When the power is turned on, low voltage levels are present at the device inputs, corresponding to the absence of input signals. The direct outputs of the triggers 1 have low voltage levels, while the inverse ones have high voltage levels. Triggers 2 are in the initial state, i.e. low voltage levels are set at their direct outputs and high levels at the inverse outputs. The high voltage levels from the corresponding inverse outputs of the flip-flops 1 and 2 hold the i and 2 counters through the terminals OR 16 and 6 in the zero state. Low voltages from the comparison blocks 14 and 9 prohibit the passage of clock pulses from the synchronization input 8 to the outputs element 2I13 and element 11. On R-BXO triggers 2, high levels of voltage are found. The device is in its original state. When the input signals of the trigger 1 are cocked on the leading edge of the input signal. High levels of signals from the outputs of the first triggers 1 are received by the J-inputs of the second triggers 2. At the same time, low voltage levels from the inverse outputs of the first triggers I through the OR 16 element are fed to the R-input of the counter 12 and allow it to work. Counter 12 starts counting. By the leading edge of the nth pulse of the clock frequency, a code will be established at the output of the counter, which coincides with the code at the inputs 15 of the code indicating the appearance of the leading edge of the output pulses. At the output of the comparator unit 14, a high voltage level is set, which passes the inputs of the second flip-flops 2 through C through the element 13 and 13 to the nth clock pulse. The information from the J-inputs of the flip-flops 2 is rewritten respectively to the outputs 4 and 5 of the first and second groups of the device. Low voltage levels from the inverse outputs of the second triggers 2 through the element OR 6 arrive at the R input of the counter 7 and permit its operation. Counter 7 starts counting. Low voltage levels from the inverted outputs of the flip-flops 2 cause the flip-flops 1 to vj the initial state. J-inputs trig

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Geers 2 are set to low levels. The counter 12 is zeroed through the OR element 16. On the leading edge of the t-th clock frequency pulse with the device clock 8, at the output of the counter 7, a code is set that matches the code 10 on the inputs of the output pulse control code. At the output of the comparator unit 9, a high voltage level is established which permits the passage of the t-th clock frequency pulse through the element 2I-NOT to the R-inputs of the second triggers 2, the triggers 2 are reset, which results in the formation of the duration of the output pulses at the outputs 4 and 5 of the device . On the direct outputs of the flip-flops 2, low voltage levels are set, and on the inverse outputs, high ones. The high voltage levels from the inverted outputs of the flip-flops 2 are reset through the element OR 6 counter 7. The inputs of the blocks 14 and 9 compare low voltage levels, the counters 7 and 12 are zeroed, the triggers 1 and 2 are in the initial state, t. The device waits for the arrival of the following input pulses on the information inputs 3.

Thus, when input signals are received, the proposed device allows generating single pulses of positive and negative polarities at the outputs, the leading and trailing edges of which are programmed with the help of command inputs: the appearance of the leading edge of the output signals and the setting of the control code for the output signal duration, and the duration of the output pulses does not depend on the duration of the input signals, since the device starts working on the leading edge of the input pulse.

Claims (1)

Invention Formula 50 Multichannel device. For information, containing the first element A.Vid kin compiler L.Pcholinska editor L. Tehred M. The IL block is wired and the trigger inputs three corresponding output codes from the info group of the response OR, which is input into the device connecting the first group to the output block of the element ment 2 and one with the other. , synchronization of the second element of the second, under the second turn of the second, the first element of the second element is 0 five 0 five 0 five 0 five 0 OR, first counter, first comparison unit and first and second triggers in each channel, the C inputs of the first triggers are information inputs of the device, the forward outputs of the first triggers are connected to the J inputs of the corresponding second triggers, the forward outputs of which are The information outputs of the first group of devices, the inverted outputs of the second triggers connected to the R inputs of the respective first triggers, are information outputs of the second group of the device and connected to the corresponding inputs of the first element nta OR, the output of which is connected to the R input of the first counter, whose C input is the device sync input, the inputs of the first counter are connected to the inputs of the first group of the first comparison unit, the inputs of the second group of which are inputs of the control code for the output pulses of the device, About the fact that, in order to expand the field of application of the device by providing the ability to control the duration of the output pulses, the second comparator unit, the second counter, element 2I, are introduced into it the second OR element and the 2I-NOT element, the first input of which is connected to the output of the first comparison unit, the second input is connected to the device synchronization input, to the C input of the second counter, to the first input of element 2I, and the output is connected to the R inputs of the second triggers, The C inputs of which are connected to the output of element 2I, the second input of which is connected to the output of the second comparator unit, the inputs of the first group of which are the inputs for setting the code for the appearance of the leading edge of the output pulses of the device, and the inputs of the second circuit. th counter, R-input of which is connected to the output of the second element OR, the inputs of which are connected to the inverse outputs of the corresponding first triggers. Proofreader A. Obruchar