RU1790027C - Optoelectronic delay line - Google Patents

Abstract

The invention relates to a pulse technique. The invention allows to increase the duration of the delay, increase the accuracy of maintaining the duration of the delayed pulses, and increase reliability. The device comprises delayed cells connected in series on a bispin optocoupler with five electrical leads, a pulse shaper along the edges, a counting trigger, a switch. The delay effect is based on the concentration of the bispin charge by the optocoupler. 3 ill.

Description

The invention relates to a pulse technique and can be used as an element with a wide range of delay times.

The purpose of the invention is to expand the scope of application, to achieve correspondence of the duration of the output pulses to the duration of the input pulses, and to increase the reliability of operation.

In FIG. 1 shows a diagram of a delay line; in FIG. 2 - diagram of bispin optocouplers; in FIG. 3 - time charts / explaining his work.

The optoelectronic delay line contains an RS-flip-flop 1, a variable resistor 2, two resistors 3,4 and capacitors 5i, 52, .... 5m, a pulse shaper along the edges, a counting trigger 7, a switch 8 and n single units 9 9g, .. ., 9p delay containing RS-trigger 1, bispin optocoupler 10,

containing five electrical leads .11-15, inverter 10, two resistors 3, 4, one variable resistor 2 and m capacitors 5i, .... 5m, and the output of the RS-trigger 1 is connected to the input of the inverter 16, the output of which, through the first resistor 3 is connected to the first terminal of the variable resistor 2, the second terminal of which is connected to the first terminal 11 of the bispin of the optocoupler 10, the second terminal 12 of which is connected to the combined first contact of the capacitors 5, x R-input 17 of the RS-flip-flop 1 and to the output 18 of a single unit delays, and also through the second resistor 4 to the common bus, the third and fourth rty leads 13, 14 bispin photocoupler 10 connected to the power bus 19, a 5-input of RS-latch 20 1 is connected to the input 21 of the unit delay block 9, yield 18 of each preceding unit delay block is connected to the inlet 20 of each poVJ

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oh oh

go VI

of the next block 9 of the delay, and the input of the first unit block 9, the delay n is connected to the output 22 of the pulse shaper, which contains four elements 23-26 exclusive OR, the output of each of the previous ones is connected to the first input of the next, the output of the last element 26 exclusive OR connected to the output 22 of the former b, the second inputs of the first three elements 23-25 exclusive OR are connected to the common bus, and the first input of the first and second input of the fourth elements 23, 26 exclusive OR are connected to the input 27 of the device, the output 18 of the last a delay unit 9s connected to the count input 28 of a countable trigger 7, whose output is connected to an output device 29, input latch 30 setting to zero is connected to a fixed contact of the switch 8, the movable contact of which is connected to a common bus. The bispin of the optocoupler 10 (Fig. 2) contains an LED 31 that is optically coupled to a photodetector 32, the substrate of which is connected to the fifth terminal 15, the ohmic contact is connected to the fourth terminal 14, and the locking contact is connected to the second terminal 12, and the anode of the LED 31 is connected to the third pin 13, and the cathode to the first pin 11.

In FIG. 3 the following designations are accepted:

UBX potential at the input of the device27;

Ua2 is the potential at the output of the shaper 6 pulses;

Ui81, Uie2, ... Ui8n - potentials at the outputs of the respective unit delay units 9;

Ovikh - potential at the output of device 29;

ti is the delay time of the pulses by one i-th block 9j;

V n tЈ Z ti

i 1

The optoelectronic delay line operates as follows.

At the initial time, a supply voltage is applied to the flight bus 19. The counting trigger 7, by closing the switch 8 (supplying a zero potential to the input 30 of setting the trigger to the zero state), is set to the zero state, in addition, the RS-trigger 1 of the blocks 9 are also set to the zero state. ...

When applying a pulse of positive polarity to the input 27 of the device using elements 23-26 exclusive

OR, at the output 22 of the pulse shaper 6, peak pulses appear (Fig. 3), respectively, along the leading and trailing edges of the input pulse, which

fed to the input 21 of the first delay unit 9i.

When the first pulse arrives at the S-input of the RS-flip-flop 1 of the first block 91, the RS-flip-flop 1 is set to

the log. 1, inverted by the inverter 16 to the zero potential from the power bus through the third terminal 13, through the LED 31 (Fig. 2) of the bispin optocoupler 10 (Fig. 1) to the first terminal 11, through the variable resistor 2 and the first 5 resistor 3 to the output of the inverter 16 current flows. LED 31 (Fig. 2) provides an optical signal to photodetector 32, which concentrates a certain charge. When the charge value reaches a certain threshold, a pulse appears at its second terminal, the duration of which depends on the time of the concentration of the charge by the photodetector. The charge concentration time is controlled by capacitors 5 (turn them 5 on to the fifth output terminal of the photodetector 32) and a variable resistor 2, which sets the current through the LED 31 (Fig. 2), and, consequently, the brightness level, on which the concentration time depends charge charge. The operation of the bispin optocouplers 10 is described in more detail in Art. O.D.Knaba. Bispin is a new type of semiconductor device. - Electronic industry. 1989, No. 8, pp. 3-8.

5 from the output 18 of the first block 9i, the delayed pulses for the time ti are input

20 second delay unit 9,

which delays them for a time tn, etc. WITH

 output 18 of the last block 9, the delayed pulses are temporarily supplied to the counting input 28 of the counting trigger 7. Since trigger 7 was in a log state. Oh, then with the arrival of the leading edge of the first impulse,

t-trigger 7 switches to the log state. 1 (Fig. 3). Upon the arrival of the second pulse, trigger 7 switches to the log state.

О The second resistor 4 is necessary to set the operating current and the corresponding potential at the output 18 of block 9.

Each unit 9i can be tuned, using a variable resistor 2 and capacitors 5, for a specific delay time.

The advantages of the proposed device in comparison with the prototype device is its expanded field of application, due to the expansion of the delay time range, matching the duration5

the output pulses of the input duration, due to the fact that the delay of the leading and trailing edges pulses is carried out by the same unit, but in the prototype by different ones, which eliminates instability.

In addition, the device according to the invention has improved operational reliability due to the fact that it does not have differential drawbacks, and also reduces the number of containers used in direct operation.

Claims (1)

The claims An optoelectronic delay line containing an RS flip-flop, the time specifying the cell, characterized in that, in order to increase the duration of the delay, increase the accuracy of maintaining the duration of the delayed pulses and reliability, a Front pulse shaper, a counting trigger, a switch and additional delay cells are introduced into it connected in series with each delay cell containing a bispin optocoupler with five electrical terminals, an inverter, two resistors, a variable resistor, m capacitors and an RS-trigger, output otorrhea through inverter connected in series, a resistor, peremen5 / L L 4L SL - :. 4f the resistor is connected to the first output of the bispin of the optocoupler, the second output of which is connected to the combined first pins of the capacitors, to the input of the RS-flip-flop and to the output of the delay cell, through the second resistor to the common bus, the third and fourth pins of the bispin of the optocoupler are connected to the power bus, S - RS trigger input is connected to the input of the delay cell, the input of the first delay cell is connected to the output of the pulse shaper at the edges, the output of the last delay cell is connected to the counting input of the counting trigger connected to the output of the output bus roystva, input setting trigger in the null state is connected to the fixed contact of the switch, the movable contact of which is connected to the common bus.   G% - 2s „hPl. # tf 9f A