SU1518904A1 - Device for phasing electronic start-stop telegraph receiver - Google Patents

Abstract

The invention relates to the field of telecommunications and can be used in data transmission systems operating in start-stop mode. The purpose of the invention is to improve the phasing accuracy with distortions of starting transitions. The device contains a shaper 1 pulse sequence of the input signal, a generator of 2 clock pulses, a shift register 3, a divider 4 frequencies, two threshold blocks 8.10, two elements And 11.12 and RS is a trigger 14. The goal is achieved by entering a block into the device 5 elements OR, elements OR 6,7, shift register 9 and inverter 13, which allows to increase the phasing accuracy due to preliminary analysis of the phase indication of a certain number of received start / stop combinations. 1 il.

Description

The invention relates to telecommunications and can be used in data transmission systems operating in start-stop mode.

The purpose of the inventor is to improve the phasing accuracy with distortions of the starting transitions.

The drawing shows the structural electrical circuit of the device for phasing the electronic start-up telegraph receiver,

The device for phasing the electronic start-stop telegraph receiver contains an input signal pulse shaper 1, a generator of 2 clock pulses, a shift register 3, a divider 4 frequencies, a block of elements OR 5, the first and second elements OR 6 and 7, the first threshold unit 8 , additional shift register 9, second threshold unit 10, first and second elements 11 and 12, inverter 13 and short-circuit trigger 14,

The block of elements OR 5 contains elements OR 15,

The device for phasing the electronic start-stop telegraph receiver operates as follows.

The information signal (input signal) from the communication channel is fed to the driver 1, in which the input signal pulse sequence is formed. All incoming information is recorded by register 3, which can be implemented on D-flip-flops, C - the inputs of which receive recording pulses from the output of divider 4. The frequency of recording pulses must be greater than the clock frequency of the transmitter and determined by the required phasing accuracy. For example, the recording frequency can be five times the transmitter clock frequency, as a result, one elementary parcel is recorded with five clock pulses of the generator 2,

Register 3 is designed for (K-1) 5 start-stop combinations. In it (when), zones of analysis of ph

call sign, and the width of the zone is determined by the value of permissible distortion in the communication channel and the frequency of the recording pulses. Each zone is formed from a series of D-trigger register cells 3, the first cells of register 3 being the first analysis zone (13A), and the last - the K-th analysis zone (at 63A). The last cell of each

Q

50

five

about q g

five

0

five

the subsequent zone is separated from the nth D-trigger of the previous zone by an amount equal to the length of the start-stop cycle. Signals from all D-flip-flops of each zone are sent to the block of elements OR 5,

When a signal corresponding to a transition type transition occurs, a pulse appears at the output of the first D-flip-flop of register 3, belonging to zone 13A, which passes to the corresponding input of the block of elements OR 5. When the next clock pulse arrives at register 3, the recorded transition of the type of starting transition moves by one turn and there is a drop at the output of the second B-flip-flop corresponding to 13A. During the passage of the transition, the type of starting transition through the zone at the corresponding output of the block of elements OR 5 is wits and pulses. The signals from the outputs of all elements OR 15 arrive at the corresponding inputs of the first threshold unit 8,

In the initial state, the outputs of the first and second threshold blocks 8, 10 and the additional register 9 present a zero potential and the RS flip-flop 14 is in the initial (zero) state.

The information is recorded and continuously shifted by the register 3. When the starting transitions appear simultaneously in the zones m of the block 5 of the elements OR 15, a signal appears at the same time and provided that r of them are the last zones, the first threshold block 8 generates a signal which will set all (t-1) triggers of the additional register 9 by S-inputs to one state. Thus, the first And 11 element is prepared for operation.

When the start transition hits the p-cell of the K-th zone, a pulse is formed corresponding to the start of the start-stop cycle, which through the second element OR 7 starts the start-stop receiver. The moment of receiver start-up will correspond to the beginning of the output of the start-stop combination from the register 3 output, t, e, from the information output of the device for phasing the electronic start-stop telegraph receiver to the input of the start-stop receiver. The launch will be performed as described above, while in

the zone cells will not simultaneously receive start transition signals. In this case, the second threshold unit 10 generates a pulse corresponding to the start of the next start-stop cycle, and sets the RS flip-flop 14 to one state, thereby preventing the operation of the first And 11 element and allowing the second And 12 element to work. ,

The appearance of the signal at the output of the second threshold unit 10 will correspond to the most accurate start of the start-stop distributor of the receiver. The maximum starting accuracy in this case is determined by the number of register cells 3 corresponding to the elementary premise of the start-stop combination.

This event (coincidence immediately on all the n-th outputs of the block of elements OR 5 is memorized for (ml) cycles by an additional register 9 when the start is lost, In addition, when the start transition is distorted in any cycle, when this combination is read from the register 3 and under the condition the presence of a permitting signal at the output of the first element OR 6, which will correspond to at least one undistorted starting transition in one of the K allowed analysis zones, will be started by starting the previous cycle, which will arrive at solid entrance.

The control input of the device for phasing the electronic start-up telegraph receiver receives pulses of the end of the start-stop cycle (information of the beginning of the next cycle), which follows from the output of the distributor of the start-stop receiver.

In the absence of a signal at the output of the first threshold unit 8 for more than one cycle under the influence of pulses arriving at the specified control input, the recorded units are shifted into the additional register 9, which preserves the open state of the first and second elements 11 and 12 and the start-up receiver starts the phasing output of the device for phasing the electronic start-stop telegraph receiver,

 If at the output of the first threshold block 8 is less than in the (m-l) cycle, a signal is received, then the additional register 9 will be written to one. When the signal disappears at the output of the first

horn block 8 m and more cycles, which may correspond to the end of the transmission over the communication channel, the additional register 9 will return the device for phasing the electronic start-stop telegraph receiver to its initial state, stopping the start of the receiving distributor,

Claims (1)

Invention Formula five 0 five , 0 A device for phasing the electron-nogte of a start-stop telegraph receiver, containing serially connected frequencies and a shift register, as well as a clock pulse generator, an input signal pulse shaper, first and second threshold blocks, RS-raptor and first and second elements AND, and a pulse generator The sequence of the input signal is the input of the device, characterized in that, in order to improve the phasing accuracy with distortions of the initial transitions, they are introduced after Optically connected additional shift register and inverter, as well as the block of OR elements and the first and second elements Or, while the outputs of the clock generator and the pulse generator of the input signal are connected respectively to the input of the frequency divider and the information input of the shift register, the output 1 of the corresponding bits of which through the block of elements OR are connected to the corresponding inputs of the first threshold block, the output of the first threshold block is connected through an additional register Moving to the first inputs of the first and second elements, And, the output of the inverter is connected to the R-BXO of the RS flip-flop, the direct and inverse outputs of which are connected respectively. . directly to the second inputs of the second and first elements AND, the inputs of the first element OR are combined with the corresponding inputs of the second threshold unit and connected to the corresponding outputs of the shift register, the output of the first element OR is connected to the third input of the second 5 of the AND element, the fourth input of which is connected to the clock input of the additional shift register, the output of the second threshold unit is connected to the first input of the second OR element and; five 0 7 15189048 FS-flip-flops, the outputs of the first and second-shift, the fourth input of the second elements AND are connected to the corresponding element AND and the outputs of the shift register -.no to the second and third inputs of the second and second threshold block are the second element OR, the third input - / s, respectively, the input signal of the Coke element AND is connected to the output of the cycle, information and phasing, the corresponding bit of the recording outputs of the device.