SU1487150A1 - Pulse sequence shaper - Google Patents

Description

The invention relates to a pulse technique and can be used when

2

converting a series of impulses of the same amplitude into a series of pulses with an envelope amplitude formed according to a certain law with the possibility of moving a maximum within a series of pulses. The aim of the invention is the extension of functionality due to the formation of output pulses with variable envelope amplitudes. To achieve the goal, the device includes the element OR — HE 9, the analog switch 4 and the voltage divider 5. The device also contains a switch 1, a decoder 2, a pulse counter 3, the element NOT 6, and two elements AND 7.8. 2 Il.

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1487150

The invention relates to a pulse technique and can be used when converting a series of pulses of the same amplitude into a series of pulses with an envelope amplitude generated according to a certain law with the possibility of moving a maximum within a series of pulses.

The purpose of the invention is to expand the functionality of the device due to the formation of output pulses with a variable amplitude envelope.

FIG. 1 shows a block diagram of a pulse shaper; in fig. 2 - time diagrams of his work.

The device contains a switch 1, the outputs of which are connected to the inputs of the decoder 2, the outputs of which are connected to the information inputs of the pulse counter 3, the outputs of all bits of which, except the senior, are connected to the address inputs of the analog switch 4, the information inputs of which are connected to the outputs of the voltage divider 5, and the high-order output of counter 3 is connected via the NOT 6 element to the first input of the AND 7 element, and directly to the first input of the AND 8 element, the output of which is connected to one of the inputs of the OR — NOT 9 element, etc. corner input is connected to the output of the element And 7 and with the gate input of the switch 4, the second inputs of the elements 7, 8 are connected to the input bus 10, the recording input of the pulse counter 3 is connected to the bus 11 of the reference pulses, the output of the switch 4 is connected to the output bus 12.

The device works as follows.

Switch 1 is set to the desired position, with the position number corresponding to the pulse number with the maximum amplitude. The decoder 2 converts the position number into the corresponding binary code, where for a series of 10 pulses the positions 1,2, ... 10 correspond to the OOP codes, 0010, 0001, 0000, 1111, 1110, 1101, 1100, 10'1, 1010. The reference impulse supplied to the input of the record of pulse counter 3, corresponding to the position of the follower 1, is written to counter 3, the counting input of which then receives a series of pulses from the input bus 10 through elements 7 and 9. Switching counter 3 is carried out on the falling edge of the pulse on the counting the entrance. The unit level at the output of the high-order discharge of counter 3 permits the input pulses to pass through element 8. The zero level from the output of the high-level counter of the counter inverted by the element HE 6 permits the passage of the input series of pulses also through the element 7 to the gate input of the switch 4. Positive pulse on the gate the input of the switch 4 allows the passage of the analog signal of the information input corresponding to the code on its address inputs. The amplitude of the signals at the information inputs is set by the divisor 5. Maximum - at the input of the switch 4 (in accordance with this, the dependence of the position number and binary code is selected).

Consider a specific case, corresponding to the time diagrams shown in FIG. 2. Let switch 1 be set to the sixth position, which corresponds to code 1110 at the inputs of counter 3 (Fig. 2a). Since at the output of the high digit of the counter 3 level "1", the first and second pulses of the converted series (Fig. 2c) do not pass to the gate input of the switch 4. After the second pulse of the converted series at the outputs of the counter are set zeros. At the same time, the passage of subsequent impulses of the input series to the gate input of the analog switch 4 (Fig. 2d) is allowed, the output of which will have a sequence of pulses whose amplitude is determined by the level of potentials at the corresponding outputs of the divider 5. Instead of the non-passed impulses of the series, we obtain zero values. In this case, the amplitude envelope maximum will fall on the 6th pulse of the series, since the maximum potential level is set to

4th output divider 5.

This device allows you to convert a series of pulses of the same amplitude into a series of pulses with an amplitude envelope generated according to a given law with the possibility of moving a maximum within a series of pulses.

Claims (1)

Claim Pulse sequence generator containing a switch, a decoder, a pulse counter, an NOT element and two AND elements, one of the inputs of the first of which is connected to an input bus, characterized in that, in order to extend the functionality, an OR element is introduced into it switch and voltage divider, the outputs of which are connected to the information inputs of the analog switch, the address inputs of which are connected to the outputs of the pulses counter bits, except for the high-level discharge, the output of which is connected to the first input of the second element And through the element NOT with the first input of the first element AND, the second input of which is connected to the second input of the second element AND, the output of which is connected to one of the inputs of the element OR — NOT, the other input of which is connected to the output of the first elemen And the gate input of the analog switch, the recording input and the counting input of the pulse counter are connected to the reference pulse bus and the output of the OR — NO element, and the information inputs are connected via the decoder to the pulses of the pulse switch. FIG!