SU1485231A1 - Divide-by-2 unit for golden rule codes - Google Patents

Description

The invention relates to computing and can be used in specialized digital computing devices. The aim of the invention is to increase speed. The device contains the element NOT 4, the element EXCLUSIVE OR 5, the elements AND 6-12, the elements OR 13, 14, 19, the triggers 15-18 with the corresponding connections. 1 il.,

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311 1485231 A1

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148.5231

four

The invention relates to computing and can be used to divide the codes of the "golden" ratio in specialized computing devices.

The aim of the invention is to increase speed.

The drawing shows a functional diagram of the device for dividing into two codes. "Golden" aspect ratio.

The device for dividing into two codes the "golden" proportions contains the input 1 of the dividend device, intended for filing a sequential code of a number, the input 2 of the device synchronization, intended for supplying a clocking sync pulse for device operation, the input 3 of the initial installation of the device, intended for the initial installation of triggers 4, designed to form an inverse sequential code of a number, the element EXCLUSIVE OR 5, the first to the seventh elements AND 6-12, the first 13 and the second 14 elements OR, prednaz triggers 15–18, which are started to form an intermediate result value, from first to fourth, are designed to memorize. intermediate result values, the third element OR 19 is designed to form a result, the output 20 of a particular device, intended to output the values of the particular bits.

The code of the golden ratio is the representation of any real number in the form

that

o =

where C; e {(), β;

oA'-ίth degree of the number "golden proportion.

The essence and the physical possibility of dividing into two consecutive codes the "golden" ratio, coming from the higher digits, is as follows.

In the code of the "golden" ratio between the weights of the digits, there is the following relationship:

= about * ¹ + ού.

When receiving the value of the ϊth digit, it is expanded to the lower order. If there is a unit in the ί-1 digit and a unit sweep occurs from the ίth digit into it, the superposition of two units in one digit is obtained. In this case, in the ί-1 bit the result of dividing a sequential code into two will be a single value. With the arrival of a single value of ί-2 digit, if there was a unit sweep from the previous digit in it, in the в-2 digit the result will be a single value, otherwise the unit will be scanned from ί-2 bit to the lower digits.

Thus, after η clock cycles, the division into two consecutive η-bit code occurs, which comes in higher digits ahead.

The device works as follows.

And the input 3 of the initial setup is given a single pulse, which sets the triggers 15-18 in the zero state.

The input of the dividend receives the sequential code of the dividend 100101100, starting with the high-order digits. With the arrival of a single high-order bit, the output of the EXCLUSIVE OR 5 element generates a signal of the logical unit that arrives at the ϋ-input of the first trigger 15, the signal of the logical one units. With the arrival of the sync pulse, the unit is written to the triggers 15 and 16, the triggers 17 and 18 remain in their previous states (zero). With the arrival of the next digit, the output of the EXCLUSIVE OR 5 element remains the same level of the logical unit, the signal of the logical unit is generated at the output of the AND 11 element, and the logical zero signal is generated at the outputs of the AND 6-12 elements.

With the arrival of the second clock at the outputs of the flip-flops 15 and 17, a logical unit signal is generated, at the outputs of the flip-flops 16 and 18 a logical zero signal. With the arrival of the next digit, a logical zero signal is generated at the output of the EXCLUSIVE OR 5 element and the outputs of the AND 7–12 elements, and a logical one signal is generated at the output of the AND 6 element. With the arrival of the next pulse, a single signal is generated at the direct outputs of the flip-flops 16 and 18, and a logical signal is generated at the outputs of the flip-flops 15 and 17

five

1485231

6

zero Signal of logical unit c. direct output trigger 18 enters through the element OR 19 to the output 20 of the device. This is the first significant figure of the private. Further operation of the device is presented in the table.

The device performs an operation with a delay in obtaining the result equal to 5 £ (where δ is the delay of one logical element).

An additional positive effect of the invention is to reduce hardware costs.

Claims (1)

Claim A device for dividing into two codes the "golden" ratio, containing seven elements And, three elements OR, and four triggers, the inputs of the initial installation and synchronization of the device are connected respectively to the installation inputs to "0" and the enable inputs of receiving triggers from the first to the fourth, direct the output of the first trigger is connected to the first input of the first element And, the second input of which is connected to the inverse output of the second trigger, the direct output of which is connected to the first input of the second element And, the outputs of the first and second elements And dineny to corresponding inputs of a second OR gate, the output / is connected 'to the data input of the second flip-flop, the output of the first OR gate is connected to the data input of the third flip-flop, the outputs of the fifth and sixth AND gates are respectively connected to with the first and second inputs of the first element OR, the output of the seventh element AND is connected to the first input of the third of the element OR, about τ 'l and h ago e5 e with the fact that, in order to improve speed, it contains an EXCLUSIVE OR element and NOT element, and the input of the divisible device is co-dined with the first input of the EXCLUSIVE OR element, with the first inputs of the third, fourth, sixth, seventh elements AND and through the HE element the third input of the first element And, 5 with the second input of the second element And with the first input of the fifth element And, the direct output of the first trigger is connected to the second inputs of the fourth, fifth and sixth elements And, the inverse the output of the first trigger connected to the third input of the second element And , the direct output of the second trigger is connected to the second inputs of the element 5 EXCLUSIVE OR and the seventh element AND, with the third inputs of the fourth and fifth elements AND, the inverse output of the second trigger is connected to the third inputs of the third and sixth, g elements AND, the output of the elements EXCLUSIVE OR is connected to the information input of the first trigger, the outputs of the third and fourth elements AND are connected to the corresponding inputs of the second element OR, the direct output of the third trigger, connected to the information input of the fourth trigger, the direct output of which is connected to the second input of the third element -) OR, the output of which is the output of a private device. Code Item Status condition trig- Output 20 five 6 7 eight 9 ten eleven 12 1 sri 15 sixteen 17 ( ¹⁸ one one 0 0 one 0 0 0 0 one one 0 0 0 '0 one 0 0 0 0 0 one 0 one 0 ] 0 0 0 0 one 0 0 0 0 0 0 0 one 0 one one one 0 0 0 0 0 one 0 0 0 0 0 0 one 0 0 0 0 0 0 0 0 0 0 0 0 0 0 one one 0 0 one 0 0 0 0 one one 0 0 0 one 0 0 0 0 one one 0 0 0 one 0 0 one 0 one 0 one 0 0 0 0 0 one one 0 0 0 00 one 0 0 0 0 0 one 0 one 0 0 0 0