SU1481880A1 - Converter stage - Google Patents

Abstract

The invention relates to amplifier technology. The purpose of the invention is to increase the speed and accuracy of the device. The goal is achieved in that a known device containing a Schmitt trigger, the input of which is the input of the device, and a serially connected controlled attenuator, the second input of which is connected to the output of the Schmitt trigger and the digital output of the device, and an amplifier whose output is the analog output of the device , the analog adder, the first input of which is connected to the Schmitt trigger input, and the output to the first input of the controlled attenuator, and the constant reference voltage source, the first and second in passages which are connected respectively to the second inputs of the amplifier and the analog adder. 2 hp f-ly, 4 ill.

Description

 one

The invention is intended for use in nonlinear analog-1 digital converters, in amplitude selection devices, as well as in amplification paths for compressing their dynamic range.

The purpose of the invention is to increase the speed and accuracy of the cascade.

FIG. 1 is a block diagram of a cascade of conversion in FIG. 2 shows voltage plots that illustrate the formation of AH in a conversion stage when a linearly increasing signal is applied to its input in FIG. 3 - voltage plots, which explain the operation of the converter when a pulse input is applied to the circuit, in FIG. 4, a diagram of an analog adder and a controlled attenuator ..

The conversion cascade consists of a constant voltage source 1, a Schmitt trigger 2, an analog adder 3, a controlled attenuator 4, the second input of which is connected to the output of a Schmitt trigger 2, and an amplifier 5.

The transform cascade works as follows.

In the initial state (no signal), the controlled attenuator 4 is in the mode of maximum transmission coefficient (e.g. 1). At the output of the analog adder 3, which means that at the first input of the amplifier 5 there is a reference voltage U ef (from the first output of the source 1 of the constant reference voltage), the value of which is selected from the ratio

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14818804

Claims (3)

Invention Formula one . A conversion cascade containing a Schmitt trigger, whose input is an input bus, and an output is a digital output bus, and is connected to the control input of a controlled attenuator, the output of which is connected to the first input of an amplifier, whose output is an analog output bus characterized in that, in order to increase the speed and accuracy of the cascade, an analog adder and a source are introduced into it where UMS Uf + U, t, d is the division factor of the included controlled attenuator 4; K t and K, j - transfer coefficients for the first and second branches of the amplitude response of the converter, In this case, the output of the amplifier 5 will be zero, since the magnitude of the reference voltage U taken from the second output of source 1 through -15 of the constant reference voltage, the first output of which is connected to the second the reference voltage and coming to the second input of the amplifier 5 is selected from the ratio  0 U from u og the amplifier input, the second output with the first input of an analog adder, the second input of which is the input 20 by the bus, and the output is connected to the information input of the controlled attenuator. When signals arrive at the input of a device with a level of UX4U1, the cascade operates with the maximum transmission coefficient. 2 a, b, c, d, 3 a, b, c, d) When the input signal level is U, the Schmitt trigger 2 is triggered, the transfer coefficient of the controlled attenuator 4 is reduced by a factor of d. At the same time, the amplitude of the signal at the output of the controlled attenuator 4 becomes equal to U 01, and at the output of the amplifier 5 to zero (Fig. 2 and 3). When the input signal levels are Ux U, the output of amplifier 5 is removed by K2 times the difference in the input Oka of the reference U 01 signals. on the transistor, three resistors and a capacitor, the first view of which is combined with the first output of the first Thus, in the proposed cascade, in comparison with the known resistance of the Resistor, it is necessary to control the formation and output of the block, the second output of the capacitor combined with the second output of the first resistor and connected to the transponder base of the pulse reference voltage from the input signal and their time synchronization. As a result the resistor whose emitter is the amplifier input, the second output with the first input of an analog adder, the second input of which is the input bus, and the output is connected to the information input of the controlled attenuator. 2. A conversion cascade according to claim I, characterized in that, in There, an analog adder is made on the emitter follower, the base of the transistor of which is the first and second inputs of the block, the emitter is the output of the block and is connected via a resistor to the negative polarity power bus, the positive polarity power bus is connected to the Transistor collector. 3. A cascade, a transformation according to claim I, characterized in that in it the controlled attenuator is made on the transistor, three resistors and a capacitor, the first view of which is combined with the first output of the first  The resistor is the control input of the block, the second output of the capacitor the resistor whose emitter is the speed and accuracy of the AS ° B bus are increased, and the collector is connected to the linear-step reproduction to the first view of the second resistor, AH, as well as the adjustment is simplified. The second output of which is the proposed Proposal cascade is a unit transform and connected to the first Vani easy to implement. As a third resistor, the second example of FIG. 4 shows a diagram of one of the construction options. 50 which is the information input of the block.  - - - - breathing figure 1 Fi & 2 ig them Ј (/ ABOUT, ABOUT and h Ui I  / with/ / L i; L Fu.Z Fi.by