SU1481732A1 - Digital generator of piece-linear functions - Google Patents

Abstract

The invention relates to computing and measuring technology and can be used in the construction of programmable single-channel generators of arbitrary functions and multi-channel generators of mutually independent sequences of rectangular pulses. The purpose of the invention is to improve the generator accuracy and the expansion of the class of tasks due to the ability of alternating methods of forming functions by summing the values of the approximating line segments and the values of the functions at points of reference. The generator includes a counter 1, a memory block 2, an adder 3, registers 4 and 5, a switch 6, a D / A converter 7, a controlled frequency divider 8, a delay element 9, and a clock generator 10. The goal is achieved by introducing register 5, switch 6 and delay element 9. 1 il.

Description

1 1481732

The invention relates to a computational technique; g can be used to build programmable generators of arbitrary functions that are proxied by linear segmenary coding for each line with the right fuse line

and multichannel generators of mutually independent sequences of rectangular pulses.

The aim of the invention is to increase the accuracy of the generator and the expansion of the class of tasks by alternating the methods of forming functions by summing the values of the approximating line segments 15 and the values of the functions at the reference points.

The drawing shows the functional diagram of the generator. Linear-piece functions.20

The generator contains counter 1, memory block 2, adder 3, registers 4 and 5, switch 6, D / A converter 7, controlled frequency divider 8, delay element 9 25, clock generator 10, i

The digital generator of piecewise linear functions works as follows.

The operating mode of the generator is preceded by the loading of block 2. In the loading process, counter 1 sequentially, starting with zero, enumerates the cells, block 2, into which the inputs 11 carry segment instructions containing information about the method of function formation by means of approximating linear segments

thirty

35

When forming the function according to the values of approximating line segments from block 2, the control input of switch 6 receives a signal of the type of approximation of a single level that switches the information input of register 5 to the output of register 4. The group of inputs of the first number of adder 3 from block 2 enters segment slope code. The group of inputs of the second number of the adder 3 receives the code of the current value of the function from the outputs of register 5. In the adder 3, the current value of the function is added to the grand elementary increment of the segment specified by the code of the slope. The sum formed is recorded under the action of the clock pulses of the generator 10 in register 4, then with some delay, the parameters determined by element 9 of the charge, are transferred through switch 6 to register 5. Registers 4 and 5 serve for intermediate storage of the new and current function values. The new value of the function from register 5 goes to the bit inputs of the D / A converter 7, is converted to the tax form and goes to the output 13 of the generator.

When forming a function based on its values at points of reference from block 2, the control input of switch 6 receives a signal of the type of approximation of the zero level, which switches the information input of register 5 to output of block 2. Function values at points of reference are based on function values at points from- 40 of unit 2 through switch b

directly to register 5 and onwards

counts, information about the slope of the segments or about the function values at the reference points, information about the length of the semect or number of repetitions of the function values at the reference points, information 45 about the end of the function. The filling of the counter 1 is performed on the inputs 12. After the block 2 is loaded, the counter 1 is zeroed out and the generator is switched to the operating mode, in which, at the outputs 13 or 14 JQ, respectively, the specified function or sequence of pulses is formed.

The operating mode of the generator begins with the arrival of the start signal at the input 55 15 of the generator 10. After that, the processing of the instructions of the first segment, which are in the zero cell of block 2, begins.

through the DAC 7 to the output 13 of the generator. i

The transition from one method of forming a function to another is carried out according to the value of the attribute of the type of approximation programmed for each segment, and, therefore, can be performed when working out the instructions of the segments in any sequence,.

When using the generator of piecewise linear functions as a multichannel generator of sequences of rectangular pulses, the information input of register 5 must be switched by switch 6 according to the signal of the type of approximation to the output of block 2 (as well as in the mode of forming analog functions

Q 5

0

five

0

five

When forming the function according to the values of approximating line segments from block 2, the control input of switch 6 receives a signal of the type of single level approximation, which switches the information input of register 5 to the output of register 4. The group of inputs of the first number of adder 3 from block 2 receives the code segment steepness. The group of inputs of the second number of the adder 3 receives the code of the current value of the function from the outputs of the register 5. In the adder 3, the current value of the function is added with the great elementary increment of the segment specified by the steepness code. The sum formed is recorded under the action of the clock pulses of the generator 10 into register 4, then with some delay, the th, determined by the parameters of delay element 9, goes through switch 6 to register 5. Registers 4 and 5 serve for intermediate storage of the new and current values respectively. functions. The new value of the function from register 5 is fed to the bit inputs of the D / A converter 7, converted into a tax form, and is fed to output 13 of the generator.

When forming the function according to its values in the points of reference from block 2, the control input of switch 6 receives a signal of the type of approximation of the zero level, which switches the information input. register 5 to the output of block 2. The values of the function in the reference points after graduating from the DAC 7 to the output 13 of the generator. i

The transition from one method of forming a function to another is carried out according to the value of the attribute of the type of approximation programmed for each segment, and, therefore, can be performed when working out the instructions of the segments in any sequence,.

When using the generator of piecewise linear functions as a multichannel generator of sequences of rectangular pulses, the information input of register 5 must be switched by switch 6 according to the signal of the type of approximation to the output of block 2 (as well as in the mode of forming analog functions

3,148

by their values in points of reference). The output signals of the multi-channel square-wave generator are removed from the outputs 14 of the generator. In this case, the number of channels is determined by the register bit 5. Phase ratios between the channels and within the pulse sequences are determined by the states of the corresponding slots of the slope code from block 2 to register 5.

The magnitude of the total increment of the segment and the length of the section of the function reconstructed by the value of the function at the reference point, as well as the length of the sections of the sequences of rectangular pulses with a phase constant for all channels are determined by the segment length code specifying the division factor of the clock pulses of the generator 10 in divider 8. the number of clocks specified by the segment length code at the output of the frequency divider 8 appears a pulse that arrives at the counting input of counter 1 and increases its content by one y.

After testing the instructions of the first segment, the output of the counter 1 is set to the address of the next cell of block 2, containing the instruction of the second segment, etc. until the last segment of the end of function indication appears in the instructions. The sign of the end of the function has zeroed the counter 1 and stops the generator 10. At this time, the formation of one period of the analog function or a set of sequences of rectangular pulses ends.

If necessary, the periodization of the function ill. Sequences of pulses, the generator 10 is restarted.

To ensure that the analog function is forced to return to its initial value during periodization (for sequences of rectangular pulses, this is unconditionally provided in accordance with the multichannel organization logic), the required initial value of the function is inserted into the zero cell of block 2 due to the form of the function segment length code and the zero value of the attribute of the type of approximation. After zeroing the counter 1 by the end of the function, the initial value of the function in the form of a segment kruppn code is received from the block 2 of the unit iodine

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the zero value of the attribute of the type of approximation directly into register 5 and determines its new state, and hence the initial

the value of the function at the output of the generator, regardless of its intermediate and final values.

Invention Formula

A digital generator of piecewise linear functions containing a counter, a memory block, an adder, a first register,

5 a controlled frequency divider, a clock pulse generator, the counter output being connected to the address input of the memory unit, the output of the code of the slope of which is connected to

0 to the first information input of the adder, the second information input of which is combined with the output of the generator, the inputs for setting the address and data of which are connected respectively to

5 to the installation input of the counter and the information input of the memory unit, the output of the code bits of the segment length of which is connected to the control input of the controlled frequency generator, whose information input and the synchronization input of the first register are connected to the output of the clock generator, the start input of which is connected to start generator input, you

The discharge bit of the signs of the end of the calculation of the memory function is connected to the reset input of the counter and the stop input of the clock generator, the output of the controlled frequency divide is connected to the counting input

the counter, the output of the adder is connected to the input of the first register, characterized in that, in order to increase the accuracy of the generator and expand the class of tasks by alternating methods of forming functions by summing the values of the approximating line segments and by the values of the functions in

reference points, a delay element, a switch and a second register are entered into it, the clock generator output is connected via a delay element to the synchronization input of the second register, whose output is connected to the generator output, the first register output is connected to the first information input of the switch, the second information and control yu

514817326

the inputs of which are connected according to the type of approximation of the memory block, are actually connected to the output of the digits of the code; the switch's output is connected to the segment input and the output of the output of the second register.

Claims (1)

A digital generator of piecewise linear functions containing a counter, a memory unit, an adder, a first register, a controlled frequency divider, a clock pulse generator, the output of the counter is connected to the address input of the memory unit, the output of the digits of the slope code of which is connected to the first information input of the adder, the second information the input of which is combined with the output of the generator, the inputs of setting the address and data of which are connected respectively to the installation input of the counter and the information 'input of the memory block, the output of the digits to and the segment length of which is connected to the control input of a controlled frequency divider, whose information input and synchronization input of the first register are connected to the clock pulse output, the start input of which is connected to the generator start input, the discharge output of the signs of the end of the memory block function calculation is connected to the counter reset input and input to the stop of the clock pulses, the output of the controlled frequency divider is connected to the counting input of the counter, the output of the adder is connected to the input of the first register and, characterized in that, in order to increase the accuracy of the generator and the distribution _h Schiereck class of tasks by alternating functions forming methods by summing values approximating line segments and the function values at the reference points, the delay element incorporated into it, the switch and the second register the clock generator output through the delay element is connected to the synchronization input of the second register, the output of which is connected to the generator output, the output of the first register is connected to the first information nnomu input switch, the second control information and five 1481732 6 the inputs of which are connected respectively to the output of the bits of the slope code of the segment and the output of the discharge sign of the type of approximation of the memory block, the output of the switch is connected to the input of the second register.