SU1474669A1 - Device for simulating binary communication channel - Google Patents

Abstract

The invention relates to computing and can be used to simulate digital information transmission channels in an experimental verification of the protective properties of corrective (control) codes. The purpose of the invention is to enhance the functionality of the device by reproducing error information described by Elliott-Gilbert statistics in the real binary data transmission channel. The goal has been achieved by introducing a second memory block, where the probabilities of a binary channel moving from one state to another are entered. The essence of the invention lies in the probable simulation of two states of a binary communication channel with different level of errors, the formation of distortions according to given conditional probabilities of their occurrence, and modulo two informational and distorting binary symbols. 2 Il.

Description

one

The invention relates to computing and can be used to simulate digital information transmission channels in an experimental verification of the protective properties of corrective {controlling codes.

The aim of the invention is to enhance the functionality of the device by reproducing errors described by Elliott-Gilbert statistics.

The invention is based on a Markov circuit simulation with two communication channel states, with an error level of Ј0 and Јif, as a result of which the device possesses the properties of a probabilistic discrete automaton with a given matrix of probability of occurrence of transition distortions and conditional probabilities of Ј0 the package

FIG. I shows a block diagram of the device; in fig. 2 - timing diagrams for the operation of the device.

The device for simulating a binary communication channel contains a reference generator 1, the first and second probable switches 2 to 3f, the first and second blocks 4 and 5 of memory, the first and second triggers 6 and 7, and the adder 8 modulo two.

The device works as follows.

Binary symbols of the information sequence {В; (Fig. 2e) arrive at the first input of the adder 8 along

J

rf

About O5

WITH

module two. The introduction of errors into the information sequence b is carried out by synchronously feeding the second input of the c-adder 8 modulo two to the distorting random sequence B, formed by the second trigger 7 (fig.2d). The synchronization of the sequences E} and | B-} is provided by using the pulses of the reference generator 1, which specifies the clock frequency of the information sequence in,}.

The first block 4 of memory at address (0) contains the bit binary code X 10 (X 01), which determines the value of the transition probability Pto X or 2 m (Ol) of the change matrix of the modulated communication channel the second memory block 5 at address 1 (0) enters the m-bit binary, code Y1 (Y0) S which determines the value of the error conditional probability g depending on the current (AeO, 1) state of the simulated channel.

Suppose that at the initial moment of time, trigger 6 is in Compound I, which conditionally corresponds to the first state of the modulated channel, when the error probability in a separate position is Ј, Ґ0 Then, at the outputs of the first and second blocks 4 and 5 of memory, Xto and binary codes stored in both memory blocks at

Each pulse of generator 1 (Fig. 2a) with probability P 10 appears either at the first output (Fig. 26) or with probability (1-P10) at the second output of the first probability switch 2 (Fig. 2c).

The result of the impulse streams from the two outputs of the first-like switch 2 to the S and R inputs of the first trigger 6 is a random binary signal with a discrete time, 1.2, .. (Fig. 2d)

showing the current state of C; simulated binary channel.

At the same time, the generator 1 pulses arrive at the information input of the second probabilistic switch 3 and, with unity 1 - диft, arrive at its outputs. As a result, the binary output of the distorting sequence (Fig. 2d) is generated at the forward output of the second trigger 7, which is received at the second input of module 8 modulo two to endow the information sequence {with errors with the Elliott - Gilbert statistics.

Claims (1)

Invention Formula A device for simulating a binary communication channel, containing a modulo two adder, a first memory block and a reference signal generator, the output of which is connected to the information inputs of the first and second probability switches, the first and second outputs of which are connected to the single and zero inputs of the first and second ones, respectively the second trigger, respectively, the output of the memory unit is connected to the input of setting the probability of the first probability switch, the first input and the output of the modulo-two adder are respectively input the output of the device, which is due to the fact that, in order to expand the functionality by reproducing the errors described by the Elliott – Gilbert statistics, a second memory block is inserted into it, the output of which is connected to the input of setting the second probability switch, direct the output of the first trigger is connected to the address inputs of the first and second memory blocks, the direct output of the second trigger is connected to the second input of the modulo two. Phys. 1 a $ b # g W No $  II II I I I I I II I I I I II I I I I I I ILL I I I I I I I I I I I I I, one . . . . | . P P 1 GP. . P . GP P GT p p . P . . gtr p. . p g Faye. 2 I I I I I I I I I I I I, one . . . . | . P