SU1515379A1 - Device for shaping bipulse signal - Google Patents

Abstract

The invention relates to the field of communication and can be used in data transmission systems using self-synchronizing codes, in particular in fiber-optic communication lines. The purpose of the invention is to improve the formation accuracy. The device contains a digital signal source 1, a clock source 2, two differentiating blocks 3, 4, two 5.6 pulses, a delay element 7, an OR element 8, a trigger 9 and an output matching block 10. In the device, by eliminating the error multiplication effect, the possibility of subsequent error correction and the provision of common-mode operation increases the accuracy of the transmitted information. 2 Il. 1 tab.

Description

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The invention relates to communications and can be used in data transmission systems using self-synchronizing codes, in particular in fiber-optic communication lines. The purpose of the invention is higher forming accuracy.

FIG. 1 shows the structural and electrical circuit of the device; in fig. 2 - stress diagrams for his work.

The device contains a source of 1 digital signal, a source of 2 sync signals, the first 3 and second 4 differentiating units, nepBbiii 5 and the second 6 pulse shapers, delay element 7, SB-1 8 element, trigger 9 and output matching unit 10,

The device works as follows.

The digital information signal from the output of the digital signal source 1), which is synchronously outputted in sync with the source 2 clock signal, goes to: the ed of the second differentiating unit 4 (Fig. 2a), at the output of which diffusion pulses are formed corresponding to transitions 0-1 or 1 -0 in the transmitted information signal 1 pulse signal (Fig. 2S). These pulses are fed to the input of the second driver 6 pulses, which, according to them, produces short control pulses (Fig. 26). After a delay in the delay element 1 for a time equal to half the pulse period at the output of the first impregnator 5 (Fig. 26 ,.), these pulses arrive at the second input of the element OR 8 (Fig.). At the first input of the element OR 8, an analogous sequence of pulses arrives, which is formed by differentiating the clock synchronization pulses (Fig. 22, h, e). At the output of the element AND PiJlI 8, a sequence of short pulses is obtained (Fig. 2), which is fed to the counting input of the trigger 9. Each of the short pulses received on the counting input switches the trigger 9 to the opposite state and at the same time it is considered that the trigger 9 should be set to zero (Fig. 2i).

Pervp and second outputs of the trigger 9 are connected to the inputs of the output coax

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The blocking unit 10, hp, which serves to eliminate a constant component, 1 S1, of the forward and inverse signals of the trigger 9 and match the device with the characteristics of the communication line.

The change in the phase in the received bi-H1ul1 code occurs necessarily from bit to bit and, moreover, in the middle of the bit interval in the case of a change in the value of the non-editable digital information signal (Fig. 2i).

Forming a linear code at the output of the device thus has a high synchrophysic properties; provides for the reception of the in-phase reception of data bits, and also allows for the correction of all non-group-based signals.

The synchronization properties are understood as the possibility of adjusting the position of the receiver's master oscillator in the bit of received data.

The synphase of receiving the data bits is provided by encoding the following further characters of the same name napoi: pulses of the form 1-1 or 0-0. This property is most important in the absence of transmitted information. In this case, in the communication line, the J-neuid code has a structure corresponding to the boundaries of the transmitted bits (Figure 2c),

The possibility of error correction is provided by the mutual dependence of the pulse sequence in bits. The order of followings and myles in the code in question is determined in accordance with the truth table.

In the table, the symbol X denotes an arbitrary pulse value in a bit.

As can be seen from the above STANDARD table, both bits of the nth bit are uniquely determined by the last bit of the n − 1 bit and the first bit of the a + 1 bit. So, for example, if the last bit of the p-1-st bit had

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the value is 1, and the first bit of p + 1-bit is O, then the value of the pulses in the n-th bit should be 0-1. Thus, it is possible to correct all one-time errors that are not group-based (i.e., those that follow each other). 1 In addition, due to the peculiarities of the biosN generated by the device: the pulse code of the receiver produces clear boundaries of each bit interval. This is especially important in data transmission systems in the organization of silent mode, i.e. when in the absence of information in the communication channel, synchronization signals of 1 c 1 i are transmitted. Each synchronous impulse transmitted over the communication line, produced by the device in silent mode, occupies the entire bit interval, which ensures the synchronous operation of the receiving devices. Thereby, the probability of missing the start of the transmission of information and, consequently, the occurrence of the error multiplication effect is significantly reduced. By virtue of this property, it is possible to refuse transmission over the communication line of starters when switching from silence to information transfer mode. In this case, it suffices to impose on the information transmitted the condition of transmission at the beginning of the data of a single character.

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In the device, due to the elimination of the error propagation effect, the possibility of subsequent error correction and the provision of common-mode operation, the accuracy of the transmitted information is increased.

Formulas

the invention

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A device for generating a bi-pulse signal, containing a digital signal source, a clock source, a first differentiating unit connected in series and a first pulse generator, a trigger connected in series and an output matching unit, the output of the clock source being connected, and a second trigger output Connected to the second input of the output matching unit, characterized in that, in order to maintain the formation accuracy, connected to a second differentiator, a second pulse generator, the delay element and Hjm element, a second input and whose output is connected respectively to the output of the first pulse shaper and the input of the flip-flop, the output of digital signal source connected to the input of the second differentiator.

Claims (1)

Claim A device for generating a bi-pulse signal, comprising a digital signal source, a clock source, a first differentiating unit connected in series, and 15 is a first pulse generator, a serially connected trigger and an output matching unit, the output of the clock source being connected to the input of the first differentiating unit, and the second output of the trigger connected to the second input of the output matching unit, characterized in that, in order to increase the accuracy of formation, 25, a second differentiating unit, a second pulse shaper, a delay element and an OR element are introduced in series, the second input and output of which are connected respectively to the output of Vågå pulse shaper and the input of the flip-flop, the output of digital signal source connected to the input of the second differentiator. Fig!