SU1465950A1 - Device for paraphase time-related referencing of signals - Google Patents

Abstract

The invention can be used in automation devices and computer technology. The purpose of the invention is to expand the functionality of the device. The device contains triggers 2 and 3, two elements AND element 2И-OR 4 and bus 1, 6 and 7 input, clock pulses and output, respectively. The connection of the I and K inputs of the trigger 2 with the bus 5 of the logical unit, and the D connection of the trigger 3 with the inverse output of the latter ensures the formation of a sequence of pulses. 1 il.

Description

4 About JV CO JV

The invention relates to a pulse technique and can be used in automation and computing devices.

The purpose of the invention is to increase the functionality of the device by ensuring the formation of a sequence of pulses.

The drawing shows a functional diagram of the proposed device.

The device contains an input bus. If triggers 2 and 3 are an element 2I-YLI 4, SCH5nu to 5 sucker units, bus 6 and so on pulses and output bus 7.

Bus 1. is connected to the K-inputs of the flip-flops 2 and 3 and the third inputs of the elements AND of the element, PI 4, the first and second inputs of which are connected to the outputs of the flip-flops 2 and 3, the inputs of which are connected to the bus 6 clock pulses, 5 of the logical unit connected with 1 and K-inputs of trigger 2, B-input of trigger 3 is connected to its inverse output, the output of element 2I-OR 4 is connected to. output bus 7,

The device works in the following way.

: In the initial state at the input one, there is a state of logical zero, which provides the first logical order for the 1 and K outputs of the flip-flop 2 and the forward D-output of the flip-flop Z.i, therefore, but output bus 7.

Bus 6 receives a continuous sequence of clock pulses.

On the rising edge of the control signal from PPNNA 1 to the nulling II and K inputs of trigger 2 and nulling D input;, trigger 3 begins to affect the level of the logical unit that allows these triggers to operate in the counting mode, which is provided by the connection I- and K-inputs of trigger 2 with the source of logical unit, and -Gh-input of trigger 3 with its inverse output. If the rising edge of the signal on bus 1 coincides in time with the level of the logical unit of clock pulses from bus 6, then on the next step clock edge trig ger 2 is set to one and trigger 3 is continued

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It remains in the zero state, which results in the appearance of the element 2И-OR 4 and the output bus 7 of the level of the logical unit, which represents the first impulse of succession. On the next rising edge of clock pulses, trigger 3 is set to one state, and trigger 2 continues to remain in one state, which leads to the appearance of a logic zero level at the output of element 2И-OR 4. The next falling and rising edges of clock pulses in the zero state, successively trigger 2 and trigger 3, which will lead to the formation of a second pulse of the sequence at the output of element 2I-OR 4. Similarly, subsequent pulses are formed at the output of the device. If the rising edge of the signal on the input bus 1 coincides in time with the logic level of zero clock pulses, then the first trigger state 3 goes to the first state and the second trigger 2 turns to the zero state in the same way. At different states of the direct outputs of trigger 2 and trigger 3, the output of element 2I-OR 4 will generate a pulse of the level of a logical unit arriving at the output bus 7. The level of logical zero on bus 1 arrives at the flush inputs of trigger 2 and trigger 3 translates them into the zero state, which provides a logic level. zero at the output of element 2I-OR 4. At the same time, the formation of a sequence of pulses at the output of the device is stopped.

Thus, the proposed device provides the formation of a sequence of pulses in the interval of the input signal with a time-related sequence equal to half the period of the clock frequency.

Claims (1)

Invention Formula A device for paraphase temporal pulse coupling, containing a first trigger, the direct and inverse outputs of which are connected to the first inputs of the first and second elements  14659504 And element 2I-OR, the output of which connected to all the inputs of its first and second element f Gsh e Tc ° "are combo and connected respectively to the input of the first, and the second, for the purpose of the version, m and pd: “the output of the second Jf Functionality is possible a trigger, the C-input of which is connected to the first trigger of the trigger of the pulse bus and the 2nd input of the first trigger of the trigger. The R-input of which nnn of the second trigger is connected to the input bus, the third ,, ° inverse you