SU1444739A1 - Device for input of information from two-way sensors - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used to organize the input of information into equipment control systems. The purpose of the invention is to improve the reliability of the device due to the organization of the selection of interference in duration. The device contains multiplexers 3, selectors 4 pulses by group duration, pulse selector 5 by duration, RAM memory block 6, reference elements 7, counter 8, pulse generator 9, trigger 10, element OR 11, element OR 12, element AND 13, register 14, output unit 15. The recording of information about the current state of information inputs 1 into RAM 6 occurs at a lower polling frequency. The selectors 4 control the signals recorded in the RAM 6 in duration. The selector 5 blocks the passage of the signals of the comparison elements 7 in the mode of recording information in the RAM to the output 17 of the interrupt request. After the end of the recording, the device is switched to the polling mode of the inputs 1. The polling is performed at a higher frequency. When a change in the state of any information input is detected, the generator 9 is turned off and an interrupt request signal is output to output 17. It is possible to interrogate or monitor the selected group of information inputs 1. 4 or less. 1 tab. i (L

Description

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The invention relates to automation, and

computer technology and can be used to organize the input of information B of the equipment management system.

The purpose of the present invention is to improve the reliability of the device by arranging for the selection of interference over the duration.

FIG. 1 shows a functional diagram of the device; in fig. 2 shows an embodiment of a pulse selector in terms of duration; in fig. 3 shows an embodiment of a pulse generator; in fig. 4 - timing charts of the device.

FIG. 1 denotes information inputs 1 of the device, control inputs 2 of the device, multiplexers 3, pulse selectors by group 4, pulse selector by duration 5, memory block 6 (RAM), comparison elements 7, counter 8, pulse generator 9, trigger 10 , the first element OR 11, the second element OR 12, the element AND 13, the register 14, the output unit 15, the information outputs of the device 16, the interrupt request output of the device 17, the inputs, and the outputs of the elements of the device 18-37.

FIG. 2 marked one-shot 38, the item EXCLUSIVE OR 39, the element And 40, the delay element 41.

FIG. 3 marked multivibrators 42 and 43, the inverter 44 and the element OR 45.

The device works as follows.

The operation mode of the device is specified by commands from external devices (control unit, processor, computer) supplied via inputs 2 to register 14. A full set of commands entered into register 14 is shown in the table, which shows the status of inputs 33, 34, 36, 37 for each team. The states of the outputs 35 determine only the code of the number entered into the counter 8 in the recording mode, therefore these outputs do not appear in the command table.

There are various options for using commands from the complete set.

Consider the operation of the device without the elements OR 12 and I 13 (the output 34 of the register 14 is connected directly to the input 23 of the memory block 6).

To monitor the states of the sensors connected to the inputs 1, they are recorded in the memory block 6. To do this, the counter 8 is reset to the zero state by the command K 3 and the code "O from the outputs 35 of the register 14. Then the command K 13 transfers the counter 8 to the counting mode and the pulse generator 9 to. reduced frequency 3 (trigger 10 on), block 6 of memory in read-write mode. A counter 8 at a lower frequency switches the address inputs of the multiplexers 3 and the memory block 6. Signals from inputs 1 are received through multiplexers 3 and pulse selectors through

the duration of group 4 into the corresponding cells of memory block 6. Short interferences with pulse selectors are of the duration of group 4 on memory block 6

does not pass. At the output of the element OR 11, interrupt signals may appear, but they will not pass to exit 17 if the time delay of the pulse selector is 5 greater than that of the selectors 4. At the end of the survey

of all inputs 1, the signal from the overflow output 28 of the counter 8 resets the trigger 10 to the initial state, as a result of which the pulse generator 9 switches to the increased frequency mode. Next, the input 1 is polled at an increased frequency. When the signal changes at any input 1, an interrupt signal appears at the output of the OR 11 element, which is fed to the input 30 of the pulse generator 9 and turns it off. Then with a delay

determined by the selectors 4, the contents of the corresponding cell of the memory block 6 are overwritten — the interrupt signal disappears and the interrogation of the inputs 1 is resumed.

To transfer the device to the control mode, a command K 8 is sent to register 14, according to which the memory block 6 is transferred to the Read mode, the inputs 1 are polled at an increased frequency. When the signal changes at any input 1 at the moment of polling this input, an interrupt signal appears at the output of the element OR 11, which turns off the pulse generator 9. With a delay determined by the selector 5, the interrupt request signal appears at output 17. The signals from the outputs of the elements of comparison 7 and from the discharge outputs 27 of the counter 8, which are fed to the output unit 15, indicate the address of the activated sensor. After reading the information from the outputs 16 to the register 14, the command K 12 is sent, according to which the block 6 of the memory is transferred to the mode "Record-read." After a time determined by the delay of the selectors 4, the K 8 command is reintroduced, according to which the monitoring of the sensors is resumed. If there is interference at the outputs 1

At the output of the OR element AND an interrupt signal appears, which pauses the operation of the counter 8 for the duration of the interference. In this case, the signal at output 17 does not appear.

To simplify the operation of the device in its

The composition of the elements are OR 12 and And 13. In the presence of these elements, the device operates as follows.

Initially, the reset of the counter 8 is also reset to the initial state by the command K .2 and the code "O from the outputs 35 of the register 14. Then the command K 9 is given, which from the output 33 of the register 14 to the input 22 of the memory 6 gives the signal" Read pulse generator 9 starts

through input 31, the signal from the output of trigger 10 through the OR element 12 is fed to input 23 of memory block b, including the Record. The pulse generator 9 when the trigger 10 is on operates at a lower frequency, at which the states of the inputs 1 are recorded in the memory block b. At the end of the polling cycle of the inputs I, the signal from the output 28 of the counter 8 resets the trigger 10. At the same time, the signal "Record from the output 23 of the memory block U is removed, and an interrupt signal appears at the output of the AND 13 element, which through the OR 11 element enters the input 30 pulse generator 9 and turns off the last. In addition, a signal appears at output 17, through which a K 8 command is given and control of inputs 1 begins, similar to that described. Thus, there is no need to monitor the end of the write cycle in the memory block of the states of the inputs 1, which simplifies and improves the reliability of control over the operation of the device.

Thus, the device allows

perform parallel-sequential polling of inputs at a higher frequency, interrupting polling for a short time to select interference by duration, without issuing a false interrupt request signal, output addresses of triggered inputs, and resume polling inputs after reading and rewriting information.

Claims (1)

Invention Formula 15 A device for inputting information from on-off sensors, comprising a register, a memory unit, comparison elements, a counter, a trigger, a pulse generator, the output of which is connected to the clock input of the counter, whose information outputs are connected to the address inputs of the memory block and The first inputs of the comparison elements 20 are connected to the outputs of the memory unit, characterized in that, in order to increase the reliability of the device due to the organization of the selection of interferences in duration, the device is multiplexed At the end of the write cycle and 25 switchgear selector switchgears for the switch-off trigger 10, the interrupt signal, the first and second elements OR, - a pulse selector for the duration and eleven In a number of cases, the K 8 command can be filed before the end of the recording cycle. 35 neither at the output of the element does And 13 appear, and the pulse generator 9 is immediately turned on at an increased frequency. This variant of device control is possible in the case when there is no need for a signal to interrupt 30 vanity pulses at the end of a recording cycle. In addition to continuous parallel-sequential polling of all inputs 1, the device allows you to switch on any group of inputs 1 to control. 8. On command K 10, memory block 6 is transferred to the Read mode, and counter 8 is in register mode, at which the pulses at input 26 are not accepted. The signals from the bit outputs 27 of counter 8 include the corresponding addresses of the multiplexers 3 and the memory block block. As a result, the selected group of inputs 1 is under control. And, the output of which is connected to the input of the first OR element, the output of which is connected to the start input of the generator and the input of the pulse selector for the duration, the output of which is the output of the device interrupt request, the inputs of the pulse selector for the duration of the group and. the second inputs of the comparison elements are connected to the outputs of the multiplexers, the outputs of the comparison elements are connected to the inputs of the group of the first OR element, and are information outputs of the device, the outputs of the pulse selectors are connected to the information inputs of the memory unit, 40 45 the register inputs are the control inputs of the device, the first, second, third and fourth register outputs are connected respectively to the read input of the memory block, the first input of the second OR element, the installation input of the counter and the S input of the trigger, which is combined with the AND input element. The outputs of the register group are connected to the information inputs of the counter, the transfer output of which is connected to the R input of the trigger, the output of which is connected to the input of the switching frequency of the pulse generator and the second inputs of the And element and the second element This OR, the output of which is connected to the input of the memory block, the information outputs of the counter are connected to the address inputs. The MultiDevice also allows to output information on the current status of the inputs 1. For this, the register 14 is given the code of the number of input group 1 and the command K 2, by which the memory block b is disconnected from the elements of comparison 7, as a result, information on the current state of the inputs 1 is received from the outputs of the latter to the output block 15, and not signals of their workings50 the register inputs are the control inputs of the device, the first, second, third and fourth register outputs are connected respectively to the read input of the memory block, the first input of the second OR element, the installation input of the counter and the S input of the trigger, which is combined with the AND input element. The outputs of the register group are connected to the information inputs of the counter, the transfer output of which is connected to the R input of the trigger, the output of which is connected to the input of the switching frequency of the pulse generator and the second inputs of the And element and the second element that OR, the output of which is connected to the input of the memory block, the information outputs of the counter are connected to the multivantiated address inputs. Switching of groups of inputs 1 of 55plexors, informational inputs of which This is done by changing the code numbers of the groups of inputs 1 in register 14. Thus, the device allows perform parallel-sequential polling of inputs at a higher frequency, interrupting polling for a short time to select interference by duration, without issuing a false interrupt request signal, output addresses of triggered inputs, and resume polling inputs after reading and rewriting information. Invention Formula YU 15 20 pulse selector by duration and ele5 0 pulses And, the output of which is connected to the input of the first OR element, the output of which is connected to the start input of the generator and the input of the pulse selector for the duration, the output of which is the output of the device interrupt request, the inputs of the pulse selector for the duration of the group and. the second inputs of the comparison elements are connected to the outputs of the multiplexers, the outputs of the comparison elements are connected to the inputs of the group of the first OR element, and are information outputs of the device, the outputs of the pulse selectors are grouped by length with the information inputs of the memory block, 0 five 0 the register inputs are the control inputs of the device, the first, second, third and fourth register outputs are connected respectively to the read input of the memory block, the first input of the second OR element, the installation input of the counter and the S input of the trigger, which is combined with the AND input element. The outputs of the register group are connected to the information inputs of the counter, the transfer output of which is connected to the R input of the trigger, the output of which is connected to the input of the switching frequency of the pulse generator and the second inputs of the And element and the second element that OR, the output of which is connected to the input of the memory block, the information outputs of the counter are connected to the address inputs of multi-plexors, whose information inputs These are the information inputs of the device. About About About About About About About 1 1 1 about o 1 1 about about 1 1 о о 1 1 about o 1 1 about 1 about 1 about 1 about one about 1 1 about 1 about 1 about 1 Faye. 2 50 29 28 n I I Y7 2 five five Faye. J 50 P