SU1441444A1 - Device for assessing occupational fitness of operators - Google Patents

Abstract

The invention relates to simulators of operators of control systems and can be used in professional selection and training of operators. The purpose of the invention is to improve the accuracy and speed of the device. This is achieved by introducing the response memory block 7, the pulse distributors 12 and 13, the keys 14 and 15, the inverter 17, and the new technical solution of the error input block 9. The essence of the invention is the ability to determine the professional suitability without the process of removing the intermediate characteristics of the operator, thus speeding up the process of obtaining the final result. 1 3.p. f-ly, 1 ill.

Description

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The invention relates to simulators of operators of control systems and can be used in professional selection and training of operators,

The purpose of the invention. is an increase in the accuracy and speed of the device

The drawing shows a functional diagram of the device for assessing the professional suitability of operators of ACS.

The device contains an operator panel 1 with single pulse formers of units 2 and zeros 3, element OR 4, pulse divider 5, trigger (Omitta 6, block 7 of response memory, block 8 of input of standards, block 9 of error input, first key 10 block

11registrations, the first distributor

12 pulses, second distributor

13 pulses, second and third keys 1D and 15, switch 16 and inverter 17,

The error input block 9 contains modulators 18 ,,,,, 18 modulo two, whose inputs are the first and second inputs of the block, the elements AND 19 1 ,,,, 19., Whose outputs are connected to a multi-position switch 20, an inverter 21, the output of which is connected to the information input of the key 22, the output of which is the first output, and the control input the third input of the block. The output of switch 20 is the second output of the block.

The registration unit 11 comprises an indication unit 23 connected to the output of the element 19, cycle counters 24 and 25 connected to the output of the pulse distributor 13, and error counters 26 and 27 connected to the output of the pulse distributor 12.

The reference input block 8 contains a switch 16 and a memory block 28.

After switching on, the simulator works as follows.

The teacher selects a specific algorithm for presenting characters (zeros and ones) to the student. The task of the student is to determine the algorithm of the teacher. A student trained in cycles forms his own algorithm, and he is one tact ahead of the algorithm of the teacher's teacher. The learner compares both algorithms in tacts and corrects his own, to achieve complete coincidence with the experimenter’s algorithm, which

cyclically repeated. In block 9 error input is a comparison of the algorithms of the teacher and the learner. As soon as the algorithms match, at the last step the inversion of one stimulus of the teacher’s teacher occurs and the student is forced to continue working. The teacher determines the characteristics of the student according to the number of cycles required for the complete coincidence of the algorithms and the number of errors committed in this case, before and after introducing the error,

Before the trainee starts working on the simulator, the teacher using block 28, which is an annular shift register assembled on D-triggers, determines the length of the stimulus presentation algorithm by limiting the register cells and the nature of the algorithm structure by writing to the corresponding cells of units and zeros. The length of the algorithm is set using switch 16, through which information from the last enabled register trigger is switched to the first one. At the same time, the switch 20 of the error input block 9 is set in such a way that the signals from the last enabled trigger of the block 28 are switched through the adder 18 modulo two, the AND 19 element and the switch 20 to the output of the block 9, Information from the output of the standard input block 8 error block 9 is supplied in the forward code,

In the initial state, the counters 24-27 are reset, at the second output of the error input block 9 there is no signal, which ensures the switching of the information inputs of the distributors 12 and 13 pulses to the counters 26 and 24, The same signal closes the key 14 and opens the key 15, Zero potential Keys 10 and 22 are open from the second output of Shitt trigger 6

Learning randomly presses the O or 1 buttons (not shown). Suppose he pressed the O button, the shaper 3 single impulses of zeros will generate a pulse that will write zero to the first cell of the 7 response memory block and through the IYitta trigger input 6 and a divider of 5 pulses, the division factor of which is equal to the length of the algorithm and is set to 44

perimentator in advance. The trigger 6 switches to a single (unstable) state in which the key 10 closes the signal from its second output and the signal from the first output of the standard input unit 8 goes to the display unit 23, on the indicator of which (not shown) the output state is displayed. In addition, the same signal closes the key 22 of the error input block 9. The return of the trigger 11 to the initial state disconnects the display unit 23 from the block 8, and the signal from its inverse output, arriving at the first inputs of blocks 7 and 8, will shift the contents of their registers to the right by one bit, and the information from the last one

modulo two is Wits zero, which removes the unit from the outputs of the And 19 elements, even if the prediction and the algorithm were the same. In addition, the zero signal from the output of the cooler 18 is inverted on the inverter 21. Through the switch 22, the control input of which from the trigger 1 mitt 6 receives a switch-on signal, and the distributor 12 receives a pulse to the counter 26, which detects an error

. Thus, the signal at the second output of the input block 9 errors in the Wits only if the teacher and the learner algorithms completely matched. Under the influence of this signal, the distributors 12 and 13 pulses re-commute their information inputs.

in this experiment, the trigger register is on the second outputs and now the information of block 8 will be overwritten by the closed key 14 to the first.

The number of cycles of the algorithm presented to the student through the distributor 13 is recorded by the counter 24,

The student visually fixes the first member of the teacher's algorithm and again presses one of the buttons as he likes.

unit,

chi about the number of cycles presented to the student and the number of admitted errors, while errors will be recorded by counters 25 and 27. At the same time, this same signal blurs key 14 and closes key 15, therefore, information from the last trigger activated by block 28 to the first trigger is affected by signal from the first

At the same time, the operation of all the blocks and elements of the HFmitt 6 trigger will be recorded in the introspection schemes similar to that described and the response memory block 7 is filled. Information from the outputs of blocks 7 and 8 is fed to the adders 18 modulo two blocks 9 error input. Since the information from block 7 arrives in the inverse code, the output of the adder 18 will be one if the first member of the algorithm of the learner coincides with the first member of the teacher's algorithm. During the next action, the student matches the member of the algorithm at the same time moves to the next memory location.

in blocks 7 and 8, and the new prediction of training that is trained by the signal

The match is again compared with the newer sequence term of the experimenter’s algorithm on modulator two 18. If two members of the algorithm match, the element AND 19 is turned on and the unit appears at its output, which is fed to the first input of switch 20 and to the first input of AND 192, the unit at the output of which appears only when the third member of the algorithm coincides.

If, on any measure, the student incorrectly predicted the teacher's algorithm, then at the output of the adder 18.

chi about the number of cycles presented to the student and the number of admitted errors, while errors will be recorded by counters 25 and 27. At the same time, the same signal blurs key 14 and closes key 15, therefore the information from the last trigger activated by block 28 to the first trigger is affected by the signal from the first

versa, the signal is removed from the second output of the error input block 9. In this case, the distributors 12 and 13 of the pulses remain in the switched state, the key 14 is closed again, and the key 15 is opened.

The learner works with the device until the next complete match of the algorithms. Work all elements and

units of the device is carried out as described. When the signal reappears at the second output of the error input block 9, it is provided that the buttons on the console are locked.

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finishing work with the device. Analyzing the information of the counters 25-27, the teacher determines the characteristics of the student, which are used to evaluate his ability to be used as an operator of the control systems, then he takes the device to its original state,

Claims (1)

Claim 1. A device for evaluating the professional suitability of ACS operators, containing an operator console, an OR element, a pulse divider, trigger5. Schmitt's rep, the standard input block, the error input block, the registration block and the first key, the output of which is connected to the first information input of the registration block 5, and the information input of the first key are connected to one of the outputs of the standard entry block, the first output of the Tsiitta trigger is connected to the control inputs of the first key, and the input is connected to the output of the OR element and the input of the pulse divider, the first output of the operator’s console is connected to the first input of the OR element, the second input of which is connected to the second output of the operator’s console, characterized in that In order to improve the accuracy and speed of the device, the second and third keys, the first and second pulse distributors, the memory block, the first and second information inputs of which are connected to the first and second outputs of the operator console, are entered into it; the memory input of the memory block is connected to the second trigger output, the outputs of the memory block are connected to the first group of information inputs of the error input block, the first output of which is connected to the information input of the first pulse distributor; the first and second outputs of which are unified with the second and third inputs onnmi Informational recording unit. The fourth and fifth informational inputs of which are connected to the first and second outputs of the second pulse distributor, whose information input is connected to the output of the pulse divider, and the control input is connected to the second output of the error input block, 46 The control inputs of the first pulse distributor, the second and third keys, the information input of the second key are connected to the output of the input unit and the inverter input, the output of which is connected to the information input of the third key, the output of which is connected to the address input of the ethanol input unit, the outputs of the input block of standards} 1e with the second group of information inputs of the error input block, and the read input is connected to the second a Schmitt trigger output, the first output of which is connected to the control input of the error input block, 2, the device according to claim. D, characterized in that the input block error contains a switch, an inverter, a key, And elements and adders, the first and second inputs of which are the first and second groups of information inputs of the block, respectively, the output of the first adder is connected to the first input of the first element I, the second input of the first element I is connected to the output of the second adder, and the outputs of the elements I are connected to the switch inputs, each output of the previous element And is connected to the first input of the subsequent element And, the second inputs of which are connected to the outputs of the corresponding adders, the inverter input is connected to the output the first adder, and the output is connected to an information key input, the control input of which is the control input of the block, and the output is the first output of the block, the output of the switch is the second output of the block.