SU1394181A1 - Device for checking electric plug-to-plug connections - Google Patents

Abstract

The invention relates to electrical measuring equipment and can be used to test electrical connections of electronic equipment. The invention provides an increase in the information content of the control. The device contains a trigger. Ger 1, Element OR 2, Generator 3 Pulses, Counter 4, Block 6 Comparison. sl s: eo

Description

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registers 7 and 11, object to be scanned 8i, error error block 9, encoder 10, elements AND 12 and 14, NOT element 13, display unit 15, delay element 16. The proposed device provides the operator with sufficient FULL error information.

the details of the object being inspected, such as, for example, an open circuit, a short circuit, incorrect connections, as well as codes of the tested and faulty circuits. This reduces the time required for troubleshooting. 1 hp f-ly, 2 ill.

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The invention relates to electrical measuring equipment and can be used for testing electrical connections of electronic equipment.

The purpose of the invention is to increase the information content of the control.

FIG. 1 shows a block diagram of the device; in fig. 2 is a block diagram of the error block.

The device contains a trigger 1, the first input of which is connected to the output of the element OR 2, and the second input - to the control input Start of the device. The output of the trigger 1 is connected to the input of the pulse generator 3, the output of which is connected to the counting input of the counter 4, the outputs of the latter are connected to the inputs of the decoder 5, the first inputs of the comparison unit 6 and the information inputs of the first register 7;

The first (informational) outputs of the decoder 5 are the outputs of the device (connected to the inputs of the object under test 8, the outputs of which are connected to the first inputs of the error isolation unit 9, which are the first inputs of the device. The first outputs of the selection unit 9 errors are connected to the inputs of the encoder 10, the outputs of which are connected to the second inputs of the comparator unit 6 and the information inputs of the second register 11. The output of the comparator unit 6 is connected to the input of the first And 12 element of it through the HE elements 13 to the input of the second And 14 element. orogo AND gate 14 is connected with the control inputs regist- trench 7 and 11, unit 9 vscheleni error and the first input of OR 2, the output of which is connected with a zero input

trigger 1. The second output of the decoder 5, corresponding to the overflow of the counter 4, is connected to the reset input of the counter 4 and the second input of the OR element 2. The outputs of registers 7 and 11, the output of the AND 12 element and the second outputs of the error section 9 are connected to the inputs of the display unit 15. The output of the generator 3 pulses is connected to the input of the counter 4 and through the delay element 16 with the first inputs of the elements 14 and 12.

Block 9 in the error section (figure 2) contains a group of elements OR 17.1-17.1, each i-th input from (p-1) of the first inputs of the block is connected to the first inputs of the corresponding groups of elements OR 17.1, groups of elements BAN 18.1. The input p of the error block is connected to the second inputs of the group of elements OR 17. (p-1), the groups of elements BANCH 18. (p-1), and 19. (p-1) and to the n output of the block of the error.

The output of each element OR 17.1 (except the first) is connected to the second inputs of the previous elements OR 17. (1-1) BAN 18 (1-1), and 19. (1-1) The outputs of the BAN 18 elements are connected to the corresponding first outputs of the block 9. The outputs of the elements And 19 is connected to the inputs (p-1) of the input element OR 20, the output of which is connected to the first input of the first element And 21 and through the first element NOT 22 to the first input of the third element And 23. The output of the first element in the group of element OR 17.1 connected to the third input of the third element And 23 and through the second element NOT 25 to the first input of the first element. coagulant and 24. The second inputs of AND gates 21,

23 and 24 are connected to the error control input, and the outputs of the And 21 23 and 24 elements are the second outputs of the error split block.

The device works as follows.

Before starting work, counter 4 and trigger 1 are reset to zero on initial reset circuits. By the impulse signal, the Start, which arrives at the control inputs of the device, the trigger 1, which turns on the generator of 3 pulses, is set to one state. The latter, with such pulses, successively fills counter 4, the state of which is decoded by decoder 5. The binary status codes of the counter are fed to the inputs of comparison unit 6 and register 7. The decoder 5 sequentially delivers single signals in the circuit of the object being monitored 8, In each clock cycle the pulse of the generator 3 is fed through the element 16 of the delay to the inputs of the elements And 12 and 14 for the subsequent reading of the states of these elements. When the object 8 is healthy, the signal from the i-ro output of the decoder 5 in the i-M cycle passes through the i-th communication line of the object 8 to its i-th output and excites the i-th input of the error split 9. In block 9, the signal from the i-ro input through a series circuit of elements OR 17.i, ..., 17.2, 17.1 is fed to the input of the element AND 23 and through the element NOT 25 closes the element AND 24. At the same time, the signals at the output of each of the elements OR 17. (p-1), ..., 17.2 close the previous elements. Prohibition 18.2, .18.1. Since when a good object 8 is on subsequent inputs (i + 1) ... of block 9, there are no signals, an IM signal opens the prohibition element 18.1, the signal from the output of which is fed to the 1st output of block 9 and further to the corresponding input of the encoder 10. At the outputs of the encoder 10, the binary code of the number of the checked i-th circuit of the object 8 is generated, which is fed to the inputs of the comparison unit 6 and the register 11

When the codes of the encoder 10 and the counter 4 match, the output signal of the comparison unit 6 generates a health signal.

In case of malfunction in the facility 8

which, through the element NOT 13, closes the element I 14 and prepares an element 12 for the open-gg type of incorrect connection to the signal, the output element forms not at a given output, that 16 delays in each cycle produce at any other output. For example, with a read pulse, which is opened in the i-M clock cycle, a signal is formed instead of an E-12 element. The delay time of the i-ro output at the nth output. In this case

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Step 16 is determined by the total signal transit time in the counter 4, the decoder 5, the error extractor 9, the encoder 10, the comparison block 6. At the output of the element And 12 is formed a signal of health, which

enters the display unit 15. In subsequent cycles, the monitoring process is repeated. After filling up with 1 meter 4, a signal is generated at the corresponding output of the decoder 5, which sets the counter -4 to zero position and through trigger OR 2 trigger 1, and generator 3 is turned off. A restart of the device is carried out by a new signal start-up on trigger 1.

If the i-th communication line of the object 8 is broken when the single signal is transmitted by the decoder 5 to the i-th input of the object 8, there are no signals at all its outputs, in block 9 all elements of AND 19 and BAN 18 are closed and there is no hour. signals at the outputs of the elements OR 1 7 and 20. In this case, the element 25 is prepared for opening through the element NOT 24. At the outputs of the encoder 10, no code is generated, i.e. the codes do not match at the outputs of block 6, and its output does not produce a match signal. Therefore, the element 12 is closed, the element 14 is prepared for opening by the signal from the output of the element 13. The read pulse from the output of the delay element 16 opens the element. And 14, at the output of which an error signal is generated. This signal opens element 25 of block 9, from the output of which the signal breaks to the display unit 15. In addition, this signal allows the code from the output of the encoder 10 to be written to register 11 and the code from the output of counter 4 to register 7, as well as through the element OR 2, flips trigger 1 and turns off generator 3. Thus, in the event of a malfunction in object 8, the device interrupted; in register 7, the code of the tested circuit is set, through which an open circuit occurred in object 8 and which can be indicated to the operator.

In case of malfunction in the facility 8

A g of the wrong connection type is not generated at its specified output, but at any other output. For example, in the i-M clock, a signal is generated instead of the i-ro output at the nth output. In this case, a signal is formed at the indicated chains at the output of the element OR 17.1, which closes the AND 24 element through the NOT 25 element and prepares the And 23 element for opening. Since there is only one at the outputs of the object 8

The signal at the nth output, the elements AND 19, | OR 20 are closed and the signal from the output of the HE 22 HE also prepares for Q

opening element And 23. The signal from the n-th.

the output is fed to the encoder 10, wherein the codes at the outputs of the encoder 10 and. counter 4 do not match. Comparison unit 6 does not generate a health signal 5, and from the output of the element 12, it is read

error signal that stops

generator 3, opens element 23 and permits writing the codes of the encoder 10 and counter 4 to registers 7 and 11. In a 20-kim way, the output of element 23 is 5 In the display unit 15, an incorrect connection signal is given, the register 7 records the code of the checked i of the 8th circuit of the object 8, in the register 11 - 25 code of the incorrectly activated n-th circuit of the object 8.

In the event of a short circuit-type fault, a signal is formed at two or more outputs of object 8, the example in the iM cycle at the i-th and n-th outputs of object 8. In this case, the signal at the output of the element OR 17.1 is also generated, the signals at the inputs of the element And 19.1, which opens the element OR 20 and prepares the opening element And 21. At the same time, the signal at the nth output of the object 8 takes precedence over the signals at all its previous outputs, since this signal in block 9 closes the element PROHIBITION 19. (p-1), as well as through a series circuit of elements s OR 17 (n-1), 17.1, 17.2 closes ele35

COPs FORBIDDEN 18.1, ..., 18.1. So

Thus, in the case of several signals at the outputs of object 8, the inputs of the encoder 10 are only given a signal from one output of block 9, which takes precedence over its other outputs. In the considered case, the codes at the inputs of the comparison unit 6 also do not match, and at the output of the element 14, an error signal is generated which opens the element 21 and allows the writing of codes in registers 7 and 11. In this case, from the output of the element 21 in the block 15 indication the signal is short circuit, in the register-7 the code is written

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My i-th circuit of object 8, in register 11 is the code of the n-th chain, which is closed to the tested circuit of object 8. The device works in the same way with any other combination of faulty circuits of object 8. As with all the malfunctions, the device is interrupted for documentation signs of malfunction, then to continue operation, it is necessary to re-send the Start-up signal to trigger input 1. At the same time, operation of the device continues from the state of counter 4, modified to - - - I relative to its state in which the stop has occurred.

The proposed device provides the operator with sufficiently complete information about the malfunctions of the object being inspected, namely, the type of malfunction (open circuit, short circuit, incorrect connections), codes of the circuit under test and the faulty circuit. This reduces the time required to search for faulty circuits and troubleshoot.

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Claims (2)

1. A device for checking electrical interconnects, comprising a pulse generator, the output of which is connected to the counter input of the counter, the outputs of which are connected to the first inputs of the comparison unit and the inputs of the decoder, the first outputs of which are the outputs of the device, the first register and the display unit are different. In order to increase the information content of the control, an error extraction block is entered into it, the first inputs of which are the first inputs of the device, the encoder, the second register, the trigger, the SH) element, holders, the element NOT, the first and second elements I, the first inputs of the first register are connected to the outputs of the counter, the first outputs of the error extractor are connected to the inputs of the encoder, the outputs of which are connected to the first inputs of the second river register and the second inputs of the comparison unit, the output of which directly connected to the first input of the first element I and through the element NOT to the first input of the second element I, whose output is connected to the second inputs of the first and second registers, to the second input of the error extractor and the first 71394 The input of the OR element, the second input of which is connected to the second input of the counter and the second output of the decoder, the output of the OR element is connected to the first control input of the trigger, the second control input of which is the second input of the device, the output of the trigger is connected to the input of the pulse generator, the output of which connected to the | Q input of the delay element, the output of which is connected to the second inputs of the first and second elements AND, and the outputs of the first and second registers, the first element AND and the second outputs of the block, error division, are connected respectively -retarded with the first, second and third inputs of the indication unit, 2. The device according to claim 1, from -J.Such as it follows. The highlighted error block contains the first and second inputs and outputs, the group of elements AND, the group of elements BAN, the group of elements LLI, (n-1) -input element OR, the first, second and third elements,, 25 cops AND, the first and second elements are NOT, with each i-th entry from. (p-1) the first inputs of the block are connected to the first inputs of the corresponding i-x elements OR groups, i-x elements And l 181  eight the group and direct inputs ix of the BANKS elements, the nth input from the first inputs is connected to the second inputs of the corresponding (n-1) -th element OR of the group, (n-1) -th element of AND group and inverse inputs (n-1) th element BAN, the output of each i-ro element of the group OR, except the first, is connected to the second inputs of the previous (1-1) element of the AND group and (1-1) -th inverse input of the BAN element, the outputs of the BAN element and the -th block input is connected to the first outputs 14 and the block outputs of the elements AND groups are connected to the (p-1) input element OR, the output of which is connected to the first the input of the first element is AND, and through the first element is NOT - with the first input of the second element AND the error selection block, the output of the first element OR of the group is connected with the third input of the second element AND, and through the second element NOT with the first input of the third element AND, the second inputs the first, second and third elements And combined and connected to the second input of the block, and the outputs of the first, second and third elements And connected to the second outputs of the block.