SU1381540A1 - Device for tranposing matrix - Google Patents

Abstract

The invention relates to computing, can be used with discrete Fourier transforms and allows transposition of a continuous stream of matrices at the rate of arrival of matrix elements at the input of the device. The goal of the invention is to reduce hardware costs by writing a single element of the input matrix to the memory cell that is freed up after reading the next element of the transposed matrix. Device sof

Description

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holds input 1 for setting the order of transposable arrays, counter 2, memory block 3, switching sensors 4 and 5, AND 6 element, multiplexer 7, address bus 8 of memory block 9, data bus 10, input 11, register 12 input, write resolution channel 13, output register 14, output 15. The goal is achieved by transposing the matrices by reading, starting with the first one, from each cell of memory block 9, until complete

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interrogation of its cells, where 2 is the number

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in matrix columns; n is the sequence number of the flow matrix. With this method of counting, after reading the last element of the previous matrix, the second element of the current matrix should be read, and in parallel with the reading, the element’s free memory cell is written; following the recording, and after recording it is transposed, starting with the first of the

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The invention relates to a computational technique, can be used in discrete transformations, and allows the transposition of matrices.

The purpose of the invention is to reduce hardware costs.

FIG. 1 shows a functional a.n on the diagram of an example implementation of the device; in fig. 2 - functional scheme accumulating adders.

The device contains input 1 for setting the order of transposable arrays, counter 2, memory block 3, accumulating adders and 5, element 6 AND, multiplexer 7, address bus 8 of memory block 9, data bus 10, input 11, input register 12, recording resolution channel 13, output register 14, code 15.

The accumulating adders 4 and 5 include the adder 16 and the register 17.

The device works as follows.

Write the binary code of the address (DKA) of the cells of memory block 9 in the form:

A.-, A, LO.

where is the i-th bit of DCA, taking the value O or 1;

Hell is the least significant bit of the DFA for recording the first () of the stream matrix in memory block 9;

N is the number of bits DKA and

N 1or, P-1,

where P is a composite number, a multiple of degree 2 and equal to the volume of one flow matrix to be transposed. To read the first matrix (), the DFA takes the form

K-1

Those. the younger bit will be A ,.

The record count of the second matrix (item 2) is used the same DCA as for reading the first matrix, and the readout is performed using DCA.

-1 - o H N-t

2K

those. with an increase of n by one, i the low-order bit DFA increases by K, given that Aj is the next most significant bit for

In the device that implements the proposed method, the installation input of the counter 2, operating in the countdown mode, receives data on

sizes of transposable flow matrices in the form of a binary code of the number of bits DKA-N, which from the output of counter 2 are fed to the input of memory block 3. From block 3 code, with data on

the position of the least significant bit DFA, in the form of DFA, the second cell of block 9 is fed to the inputs of accumulating adders A and 5 (Fig. 2) operating in the summation mode (F A + B -f + transfer). At the output of accumulating adders 4 and 5, there is already a zero address of the first cell of block 9, according to which, if there is an input signal and an input register 12, the first element of the first flow matrix is recorded (step 1). The accumulated adder 4 clocked by the input register 12 enters the DFA of the following cells of block 9.

When the first matrix is fully recorded, the element 6 AND is triggered and reduces the binary code n of the output of counter 2 by one, changes the DFA at the output of block 3 by DFA

one/

2 cells and thus prepares to issue a DFA reading from accumulating adder 5 and the same DFA records from accumulating adder A. Thus, taking into account the fact that the reading speed must be not less than the recording speed, the second matrix (n 2) is written in the consecutively free cells of block 9 at the time between the reading of the individual elements of the first matrix. After recording the second matrix at the output of the block

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3 will be a DFA of the 2nd cell in which the (2 +1) -th element of the second matrix is written, which is also the second element of the transposed second matrix. The process then repeats. Since the overflow pulse of the accumulating adder (C) arrives at the input of its low-order loan (Cp) (Fig. 2), it becomes possible to transpose a continuous stream of matrices.

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Formula

the invention

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A device for transposing matrices containing the first memory block, whose information input-output is the same input-output device of the device, characterized in that, c. In order to reduce hardware costs, a multiplexer, two accumulating adders, an element I, a second memory block and a counter, whose setup input is the input of specifying the order of transposable device matrices, are inserted into it, the output of the counter is connected to the address input of the second memory block, the output of which connected to the information inputs of the first and second accumulating adders, the input of the output attribute of the next element of the transposed device matrix is connected to the clock input of the first accumulating adder, output which is connected to the first information input of the multiplexer, the output of which is connected to the address input of the first memory block, the input of the input feature of the next element of the input matrix of the device is connected to the write-read input of the first memory block, to the control input of the multiplexer and to the clock input of the second accumulator The codes of which are connected to the bits of the second information input of the multiplexer and to the inputs of the element I, the output of which is connected to the counting input of the counter, and in each accumulating sum At the high-end transfer output is connected to the low-level loan input.

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Claims (1)

Claim A device for transposing matrices containing a first memory unit, the information input-output of which is the input of the same name as the output of the device, characterized in that, p. In order to reduce hardware costs, a multiplexer, two accumulating adders, an AND element, a second memory unit and a counter, the installation input of which is an input for setting the order of the transposed matrices of the device, are introduced into it, the output of the counter is connected to the address input of the second memory unit, the output of which is connected to information inputs the first and second accumulating adders, the input sign of the output of the next element of the transposed matrix of the device is connected to the clock input of the first accumulating adder, the output to It is connected to the first information input of the multiplexer, the output of which is connected to the address input of the first memory block, the input of the input sign of the next element of the input matrix of the device is connected to the write-read input of the first memory block, to the control input of the multiplexer, and to the clock input of the second accumulating adder, the outputs of which connected to the bits of the second information input of the multiplexer and to the inputs of the element And, the output of which is connected to the counting input of the counter, and in each accumulating adder outlet transfer most significant bit is connected to the borrow input of LSB. From 12