SU1363462A1 - Displacement-to-code converter - Google Patents

Abstract

The invention relates to automation and computer technology and can be used in linear displacement transducers in code. To increase functional reliability in a transducer containing emitters 2-5, code scale 6, diaphragm 7 with slits V., photodetectors 9-12, source 1 power supply, a switch 26, two code generation units 27, 28, comparators 21-24, two amplifiers 17, 18p. Two inverters are introduced. 19, 20, analog-to-digital converter 25 (ACC) and the head of the amplifier - limiter 13-16. When you move 0 D O 0 (L co a co 4: a Yu

Description

a code scale at the outputs of photodetectors, signals are formed that are amplified limited from above and below. These signals form the reference voltages on the reference inputs of the comparators, which, using a code generation unit executed on the exclusive OR elements, form the higher bits of the output code of the converter. At the same time, depending on the amount of movement of the code scales, the signals at the reference inputs of the comparators will be either high or low. Formed in accordance with this algorithm, the output code signals

one ,

The invention relates to automation and computing and can be used to convert motion into code.

The purpose of the invention is to increase the functional reliability of the converter.

The drawing shows a block diagram of the converter.

The converter contains power supply 1, emitters 2-5, code scale 6, diaphragm 7 with slots 8, photoreceivers 9-12, amplifiers-limiters 13-16, amplifiers 17 and 18, inverters 19 and 20, comparators 21-24, analog - digital converter (ADC) 25, switch 26, code generation blocks 27 and 28, which contain EXCLUSIVE CHI elements 29 and 30, respectively.

The Converter operates as follows.

When the code scale 6 is moved relative to the emitters 2-5, the diaphragm 7 and the photo receivers 9-12, signals are output at the outputs of the latter, which are fed to the inputs of the limiter 13-16. Voltage is supplied to the reference inputs of the limiters 13-16 from the source, the values of which determine the degree of limitation of the information signals from above and below. Trapezoidal signals from the outputs. The limit suppressors 13-16 are fed to the information inputs of the switch 26, the inputs

the higher bits control the operation of the converter when forming its lower bits. This is accomplished by switching the signals from the star bits of the photodetector signals to the switch. Depending on the state of the control inputs of the switch, signals of one or another photodetector pass to its output, which are converted into a digital code using an ADC. From the outputs of the ADC, the signals arrive at the inputs of the code generation block of the lower bits of the converter, where they are converted into a binary arithmetic code. 1 il.

comparators 21-24, inverters 19 and 20 and amplifiers 17 and 18.

As the code scale 6 moves relative to the photodetectors 9-12,

located directly behind the gap 8 of the diaphragm 7, the signals arriving at the information inputs of the comparators 21-24 periodically, twice for the period of movement of the code scale

6 intersect the signals arriving at the reference inputs of the same comparators, which leads to the sequential switching of the comparators 21 to 24 from the state O to the state 1 and,

on the contrary, from state 1 to O. With further parallel processing of signals by comparators 21-24 within each period of movement of the code scale 6 at the outputs of the block 28

sequentially with the discrete movement if, all combinations of the binary arithmetic code are formed that control the operation of the switch 26 and form the upper bits of the converter using block 28 executed on the elements EXCLUSIVE OR 30. The two lower bits of the block 28 serve to control the operation of the switch 26 In this case, depending on the code value, a photodetector 9, 10, 11 or 12 is connected to the output of the switch 26 at the control inputs. The signals of these photodetectors are then fed to the input of the A / D converter 25. The result of the conversion. yes ADC 25 passes

no change to the output of block 27 at zero potential at the code of the comparator 24 and the inverted rp and unit potential.

As the scale 6 moves in the direction indicated by the arrow in the drawing, a linearly increasing voltage is formed at the output of the limiting amplifier 13, which is connected to the input of the A / D converter 25 by the control code 00 of higher bits, where it converts into a binary code the block 27 arriving at the lower bus bits of the converter through the amplifier. The signal from this amplifier limiter 13 also arrives at the information input of the comparator 21, to the reference input of which, through the inverter 19, the signal comes from the limit amplifier 1.5, yuschiys high reference level for the comparator 21. By increasing the voltage at the output of limiting amplifier 13 to a value of the upper reference level at the output of ADC 25 are formed codewords binary arithmetic code LSBs. As soon as the voltage level at the output of the limiter 13 becomes greater than the reference level, the comparator 21 is triggered and 1 appears at the output of the lower bit, i.e. the code on the output high-order tires changed its state from 000 to 001. By code 01, the signal of the photo-receiver 10 is connected to the output of the comparator 26 through the amplifier-limiter 14, which at the time of displacement increases only to the lower reference level, as a result of which the lower tires The bits of block 27 are set to zero potentials. Thus, when the code scale 6 is moved to a distance equal to the sampling value 1/8 of the period of the code scale 6, output signals from 000 00 ... 000 to 000 11 11 111 are generated at the output of the converter.

Upon further movement of the code scale 6 within the interval cf, the ADC 25 converts the signal of the photodetector 10 into the binary arithmetic code. The reference input of the comparator 22 receives from the amplifier-limiter 16 the signal of the photodetector 12 through the inverter 20, which reduces the input signal, to the level of the upper reference.

At the time of the excess of the linear signal of the photodetector 10

0

five

0

five

0

five

the reference level of the inverter 20 triggers the comparator 22. At its output, a level 1 is set, which leads to a change in the code on the high-order buses from the previous 001 to the next 010 state, i.e. the code of the high bits of block 28 is increased by one and to the input of the ADC 25 sub- | the output of the photoreceiver 11 is turned on through the limiting amplifier 15, switch 26. During the time of moving the scale 6 within an hour, at the output of the A / D converter 2, the code of the lower bits of the converter from the minimum 001 00 ... O to the maximum 001 11 ... 1 values will be generated. After similar transformations within the limits of movement c /, the code at the output of the converter increases from 010 00 ... 0 to 010 11 ... 111. At the same time, the signal of the photoreceiver 11 exceeds the reference level at the input of the comparator 23 and the code at the output of the higher digits of the converter increases by one unit, i.e. becomes equal to 011, and to the input of the ADC 25 through a series-connected limiting amplifier 16, the comlutagor-26 connects linearly to the signal of the photodetector 12, which, within the limits of displacement (/., is converted to the code of the lower bits of the converter, enters the higher-order code buses without change. The code at the output of the converter will increase from 011 00 ... O to 011 11 ... 111.

At the time the signal of the photodetector .12 of the reference level formed by the photodetector 10 through the serially connected amplifier-limiter 14, amplifier 18, is triggered, the comparator 24 is triggered, the code on the higher-order bit buses of unit 28 is increased to one, taking the value 100, the most significant bit of converter changes Its status is from 0 to 1, the output of the linearly decreasing signal of the photodetector 9 is connected to the input of the A / D converter 25 with code 00 through a series-connected amplifier-limiter 13, switch 26. The signals on the outputs of the A / D converter 2 5 take values from 00 ... 000 in

the beginning of the interval e / j to the end of the interval cf, i.e. the code at the output of the converter is increased from 100 00 ... 000 to 100 11 ... 111, since the high level of the high-order bit of the converter 28 will be transferred to the inputs of the controls of block 27. At the moment when the linearly decreasing signal of the photodetector 9 becomes less than the reference signal of the photodetector 11 formed through the series-connected amplifier-limiter 15 and inverter 19, the comparator 21 operates from 1 to 0, the high-order code of the high-order bits of the converter changes from 100 to 101, to the input of the ADC 25 through the series-connected limiting amplifier 14, the switch 26 connects the linearly decreasing signal of the photodetector 10. The output code of the converter increases from 101 000 ... 000 to 101 111 ... 111.

During the time of moving the code scale 6 by the value of one period equal to St /, in the direction indicated by the arrow in FIG. 1, the current value of the output code from 000 00 ... O at the beginning of the period to 111 11 ... 1 at the end of the transfer period is generated on the output buses of the converter.

Thus, using the current value of the information signals of photodetectors 9-12 for generating reference signals allows the converter to automatically adjust to changes in information signals associated, for example, with decreasing intensity of emitters 2-5 caused by aging, exposure to ambient temperature and other factors that increase its noise immunity.

Limiting the amplitude of the photodetector signals 9-12 eliminates errors from the variation of the parameters of the photodetectors 9-12 and emitters 2-5, simplifies the operation of the converter and the electronic signal processing circuit of the photodetectors, which generally increases its functional reliability.

Claims (1)

Invention Formula Displacement transducer into a code containing four radiators, optical connected through a code scale, made of uniformly through 0 five 0 five five 0 five 0 five 0 active and passive areas with a period of 2 s /, where n is a positive integer greater than one; } - the low-order weight of the high-order group of the output code of the converter, and the 2-width aperture with four photo-receivers, power source, switch, the first, second, third and fourth information inputs of which are connected to the first inputs of the corresponding comparators, which are connected with the corresponding inputs of the first code generation unit, the first, second and third outputs of which are a group of outputs of the higher bits of the converter, the second and third outputs of the first code generation unit The first and second control inputs of the switch, the second code generation unit, the outputs of which are a group of low-order outputs of the converter, and the control input are connected to the first output of the first code generation unit, characterized in that, in order to increase the functional reliability of the converter, it introduced the chip amplifier-limiter, two amplifiers, two inverters and an analog-to-digital converter, the outputs of all photodetectors are connected to the information inputs of the same name of the limiting amplifiers, the outputs are connected to the corresponding information inputs of the switch, the first inputs of the first and second comparators are connected to the inputs of the corresponding 1x amplifiers, the inputs of the third and fourth comparators are connected to the inputs of the first and second inverters respectively, the outputs of the first and second amplifiers are connected to the second inputs of the third and third the fourth comparators, the outputs of the first and second inverters are connected to the second inputs of the corresponding ix comparators, the first and second outputs of the power supply with One is connected to the reference inputs of the analog-digital converter and all limiter amplifiers, the switch output is connected to the information input of the analog-digital converter, the outputs of which are connected to the information inputs of the second code generation unit.