SU1356221A1 - Phase locking device - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase the speed with a long loss of the input signal. The device contains a reference oscillator 1, switches 2 and 3, low-pass filters 4 and 9, an adder 5, a controlled oscillator 6, a signal detector 7 and a phase detector (PD) 8.: In the case of a prolonged loss of the input signal at the output of the detector 7, a low level signal that goes to the control inputs of switches 2 and 3. At that, switch 2 disconnects the first input of the PD from the device input and connects the output of the generator 1 to it, and switch 3 turns off the output of the PD 8 from the input of filter 4 and connects it. to the input of the filter 9. After the end of the transients, the frequency of the generator 6 becomes equal to the frequency of the generator 1, the output voltage of the filter 4 becomes equal to zero, and at the output of the filter 9 a constant voltage is generated through the adder 5 to the input of the generator 6 of such magnitude and a sign that is necessary to fully compensate for the frequency deviation of the generator 6 from the nominal value. The goal is achieved by the introduction of limiter 7 and filter 9. 1 Il. i (L

Description

The invention relates to radio engineering and can be used to create tracking systems.

The purpose of the invention is to increase the speed with a long drop in the input signal.

The drawing shows a structural electrical circuit of a phase locked loop device.

The device contains a reference generator 1, the first switch 2. the second switch 3, the first filter. 4 low frequencies (low pass filter), adder 5, controlled oscillator 6, signal detector 7, phase detector 8 and second low pass filter 9.

The device works as follows.

In the absence of an input signal at the input of the device, the phase auto-tuning of the frequency at the output of the signal detector 7 produces a low level signal, which goes to the control inputs of the first switch 2 and the second switch 3. At the same time, the first switch 2 disconnects the device input from the first input of the phase detector 8 phase-locked loop and connects to the first input of the phase detector 8 the output of the reference generator 1, and the second switch 3 turns off the output of the phase detector 8 from the input of the first low-pass filter 4 and connects it to the input of the second low pass filter 9. After the transients end, the frequency of the controlled oscillator 6 becomes equal to the frequency of the reference oscillator 1, the output voltage of the first low pass filter 4 becomes zero, and the output voltage of the second low pass filter 9 is generated through the adder 5 to the input of the controlled oscillator 6 ,, of such magnitude and sign as is necessary to fully compensate for the frequency deviation of the controlled oscillator 6 from the nominal value.

When an input signal appears at the input of a phase locked loop, namely, at the input of the signal detector 7, the following occurs: its conversion.

At the same time, at the output of the signal detector 7, a high level signal is produced, which is fed to the control inputs of the first switch 2 and the second switch 3.

The first switch 2 disconnects the output of the reference generator 1 from the first input of the phase detector 8 and connects the input of the phase locked loop to the first input of the phase detector 8, and the second switch 3 turns off the output of the phase detector 8 from the input of the second low-pass filter 9 and connects it to the first Low pass filter 4. At the same time, the first input of the adder 5 connected to the output of the second low pass filter 9 and the first output of the second switch 3 should have

correspondingly large input and output impedance. Then, for some time, it exceeds the transient time in the phase locked loop.

frequency, the output voltage of the second low pass filter 9 will remain almost unchanged.

In this case, the initial frequency of the controlled oscillator 6 will be

equal to the rated frequency of the controlled oscillator 6 and the time

Frequency capturing will not be affected by, I drift of the average controlled frequency

generator 6. In the case of a prolonged loss of the input signal at the input of the phase locked loop device at the output of the signal detector 7, a low level signal is generated and the phase locked loop device will go to its original

condition.

Claims (1)

Phase locked loop device comprising a series-connected reference generator and a first switch, as well as a second switch connected in series, a first low-pass filter, an adder and a controlled generator, as well as a phase detector, characterized in that the input signal is missing, a signal detector is inputted into it, the input of which is connected to the second input of the first switch and is the device input, and the output the signal resident is connected to the control inputs of the first and second switches, and a second low-pass filter connected between the second output of the second switch and the second input of the adder, while 0 five 31356221 4 the first and second inputs of the phase detectable oscillator, and its output torus. are connected respectively to connected to the input of the second switch outputs of the first switch and control unit.