SU1354424A1 - Device for monitoring tri-level bipolar signals - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase the accuracy of the control. The control device contains an oscillator 1, a 2 clock frequency selector, threshold blocks 3 and 4, electros AND 5 and 8, an adder 6 modulo two, electoles NOT 7 and 10, a driver 9 gating pulses, integrators 11 and 13, subtractor 12 and source 14 of reference voltages. The goal is achieved by eliminating the possibility of false error pulses at the output of adder 6 and eliminating the error detection error caused by the mismatch of the position of the control zone relative to the minimum of the total probability density of information units and zeros. Threshold blocks 3 and 4 m. The gated memory comparators are made in the form of gated memory, and the source 14 is in B1 than an adjustable voltage regulator. 1 hp f-ly, 1 ill., 1 tab. Q "(L

Description

The invention relates to radio engineering and can be used when building transmission control devices Tf) exypoBHeBbrx: signals in digital communication channels.

The purpose of the invention is to improve the accuracy of control.

The drawing shows a structural electrical circuit of the proposed device.

The control device for three-level bipolar signals. Contains a rectifier 1, a selector 2 clocks, the first 3 and second 4 threshold blocks, made in the form of gated memory comparators first element 5, the adder 6 modulo two, first element 7 , the second element And 8, the imaging unit 9 strobe pulses, the second element is NOT 10, the first integrator 11 ,. subtractor 12, second integrator 13, source 14 of reference voltages, made in the form of an adjustable voltage regulator. f

The device works as follows.

The 2 clock frequency selector provides synchronous and in-phase with Hpqi from the input signal

a continuous sequence of clock pulses, of which the driver of the 9 strobe pulses generates narrow pulses that determine the moment of comparison of the signal and reference voltages in the first 3 and second 4 threshold blocks and, therefore, their response at each clock cycle, which

in conjunction with memorizing the state between the gating pulses in the first 3 and second 4 threshold blocks, they rationing the duration of their output pulses, thereby eliminating the possibility of false error pulses at the output of modulator 2 modulo two and increasing the accuracy of error control in the channel zi The first element And 5 of the output signals of the first 3 and second 4 threshold blocks and clock pulses, the duty cycle of which is two, forms a sequence of units normalized by the pulse duration, which is the module of information units of the input signal under the condition | U (t) | , .pri, and „„, idp ,, where

and

OP1

Uc (t) is the input signal module.

t (, is the gate time, UQ, and Ugj are the reference voltages of the first 3 and second 4 threshold blocks, the second element AND 8 of the clock pulses and inverse sequences of units and errors forms a sequence of zeroes normalized by the duration of the pulses, which are 0 information zeros input signal under the condition | U (,, (t),, with

five

five

0

0

five

0

five

about

,

opg

Received, so

Thus, the sequences of pulses of units and zeros are integrated, respectively, by the first 11 and second 13 integrators, from the output voltages of which, proportional to the probability densities of the information units and zeros of the input signal, a difference voltage is generated by the subtractor 1.2, which controls the simultaneous shift in source 14 of the reference voltages of the values Ugp, and maintaining a constant value of the difference between them and, consequently, the width of the control zone, the magnitude of which shift and its sign, determined by the magnitude and sign of difference, such that the position of the control zone automatically corresponds to the minimum of the a posteriori total density of the information units and the number of signals in the transmission signal,

whereby the error detection error due to the mismatch of the position of the control zone relative to the minimum of the total probability density of information units and zeros is eliminated, and the accuracy of error control in the communication channel is improved.

The positive and negative components of the input three-level bipolar signal are combined by a rectifier 1 into a unipolar signal used in a 2 clock frequency selector to obtain a synchronous and in-phase with the input signal a continuous sequence of clock pulses, on one of the fronts of which the driver 9 gates pulses form short the pulses determining the comparison times in the first 3 and second 4 threshold blocks of the output unipolar signal of the rectifier 1 with the reference voltages provide The 14 reference voltages being treated by the source, and the period of these pulses, equal to the clock period, determines the duration of the memory and, accordingly, the duration of the pulses at the output of the first 3 and second 4 threshold blocks. Support values

stress and

from

and and

jQ, respectively, of the first 3 and second 4 threshold blocks, with Uon, U (jn, having a constant difference defining the control zone of the input signal. If the magnitude of the input signal U, at the time of comparison, is inside the control zone, then it is estimated as an error.

The selection of error pulses from the output signals V, and V, respectively, of the first 3 and second 4 threshold blocks is performed by modulator two adder 6 according to the ratios of the input signal and reference voltages of the threshold blocks shown in the table, the number of errors the number of periods of cycles for the duration of the pulse error at the output of the adder 6 modulo two.

In addition to highlighting errors, in accordance with the table, the output signals of the first 3 and second 4 threshold blocks together with the uninterrupted sequence of clock pulses are used to form the first element AND 5 of the normalized pulse duration of the sequence of input units, and the first 3 and second 4 threshold units blocks are made according to the table. Integration after

A unit integrator 11 allows one to obtain at its output a voltage proportional to the a posteriori probability density of the information units of the transmission signal. Inverted, respectively, the first 7 and second 10 elements are NOT the pulse sequences of units and errors are subtracted in the second element AND 8 from the sequence of clock pulses, as a result of which the second element And 8 forms a normalized, pulse sequence of zero input signal corresponding to the table. The integration of this sequence by the second integrator 13 makes it possible to obtain at its output a voltage proportional to the a posteriori density of probabilities information

54424

transmission zeros. The difference voltage generated by the reader 12 from the output voltages of the first 11 and second 13 integrators controls the source 14 of the reference voltages, ensuring their displacement, while maintaining a constant value of the difference between them and, therefore, 1Q offset of the control zone is constant widths depending on the change in the probability densities of information units and zeros in the transmission signal towards the minimum of their total 15 probability density, which is optimal for the position, control zone, 30

Claims (1)

Invention Formula 20 1, A device for monitoring three-level bipolar signals containing a rectifier whose input is an input of the device, and the output is connected 25 to the first inputs of the first and second threshold blocks, the source of reference voltages which first and second outputs are connected to the second inputs of the first and second respectively the second threshold blocks modulo two, the output of which is the output of set 5 0 five five 0 The first and second inputs are connected to the outputs of the first and second threshold units, respectively, characterized in that, in order to increase the control accuracy, the clock frequency selector is connected in series, the input of which is connected to the output of the micrometers, and the gate generator, the output of which is connected to the gate inputs of the first and second threshold units, the first element AND connected in series, the first and second inputs of which are connected to the outputs of the first and second threshold respectively output blocks, the first integrator and the subtractor, the output of which is connected to the input of the source of reference voltages, are connected in series the first element NOT, the input of which is connected to the output of the modulo two, the second element And the second integrator, the output of which is connected to the second input of the subtractor, the second the element is NOT, the input and output of which are connected respectively to the output of the first element and the second input of the second element, and the third input 513544246 which is connected to the output scroll-second threshold blocks are made in l clock frequency and the third input in the form of gated storing comperate element I. ratorov, and the source reference for the same time 2. The device in accordance with claim 1, 1 and 2, in the form of adjustable stabilizable, in that the first stressor voltage.