SU1328822A1 - Apparatus for exchange of information - Google Patents

Abstract

The invention relates to computing and can be used in digital computers, in multi-machine computing systems, in local data exchange networks and in data exchange systems between computers and subscribers. The purpose of the invented computer is ffti L X X) X) L L L

Description

132

shadow is an increase in the speed of a device's bandwidth by providing simultaneous multilateral exchange of information between computers in multi-machine computing systems or between various devices in a LAN. The goal is achieved by the fact that each computer or active subscriber can record information only in its own register 2. Information recorded in registers 2

The invention relates to computing technology and can be used in digital computers, in multi-machine computing systems, in local data exchange networks and in data exchange systems between computers and subscribers.

The purpose of the invention is to increase the speed of the device.

Figure 1 presents the block diagram of the device; FIG. 2 shows the arrangement of information in the channel register J in FIG. 3; the block structure of the elements in FIG. 4 is a timing diagram of signals at the clock inputs of the device.

The device contains in each channel a block 1 of elements AND-OR, a register 2, elements AND 3 and 4, circuits 5 and 6 of the comparison, and a block 7 of elements AND, as well as inputs 8 and 9 of the device.

The essence of the device is that each computer can only record information in the register 2 of its channel. The recorded information is continuously circulated in registers 2, with the equality of the recipient's address recorded in register 2 j to the computer number, information is read by the computers where the comparison occurred. I

The device works as follows.

In the initial state, in the bits of the source information field (Fig. 2) of each register 2, the value of the computer number is recorded, which can record information in this register. The code number of the computer with the first K bits of register

continuously circulates, with the recipient's address written in register 2 being equal, the computer number is allowed to read information by the computer where the comparison took place through the AND 7 block, the data is switched using the AND-OR block 1, the address comparison on the circuits Comparisons 5 and 6. The strobing of blocks 1 and 7 is performed by elements I3 and 4.4x1,

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Pa 2 (k logjM) is fed to the first inputs of the comparison circuit 5, the second inputs of which are supplied with a computer number code, as a result of which the resolving potential is applied to the input of the element 3.

The first clock pulse received from the input 9 passes through the elements AND 3 to the inputs of the AND-OR-1 blocks, allowing each computer to record information and the address of its recipient in the corresponding register.

The clock pulse arriving at the input 8 (Fig. 4) is fed to the other inputs of the AND-OR 1 blocks by rewriting the information of the registers 2.

Subsequent pulses from input 9, entering the inputs of elements 3 and 4, permit the recording of information from a computer into the corresponding 1st register 2 or reading from register 2 if the written code of the addressee matches the number of the computer. When reading register 2, it is zeroed (the reset circuit of register 2 is not shown).

Claims (1)

Invention Formula A device for information exchange containing M channels, the first information input and output of the i-ro channel (, M) being the input and output of the device for connecting the information output and input of the i-th computer respectively, the second information input of the i-ro channel is connected to the second information output (il) -ro of the channel, the second information input of the first channel is coincident with the second information output of the M-th channel, each channel consisting of a block of AND-OR elements and an information register input connected to the output of the block of I-IPI elements The first informational input of which is connected to the second information input of the channel, and the first control input is the input of the channel for connecting the first clock input of the device, that is, in order to increase the speed of the device, each channel is entered a block of elements And, two comparison circuits and two elements And, and in each channel the outputs of the register are connected to the second information output of the channel, the information of the source Discharges of the addressee Text informatta ig.2 AND And / 1and Dx.8 1SI2 pp p p p Bx.9 SI1 n n n n  Rig.  Compiled by Vertlib Editor N. Bobkova Tehred I.Popovich Order 3489/51 Circulation 672 VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., d. A / 5 Production and printing company, Uzhgorod, st. Project, 4 And the first inputs of the first and second comparison circuits, the second inputs of which are connected to the first information input of the channel and the second information input of the block of AND-OR elements, the second control input connected to the output of the first element AND, the output and control input of the block And elements are connected to the first information output of the channel and the output of the second element And, the first inputs of the first and second elements And are the input of the channel for connecting the second clock input of the device, and the second inputs are connected Nena respectively to the outputs of the first and second comparison circuits. AND AND AND and and OR OR or ag.Z Corrector S.Cherni Subscription