SU1053095A1 - Device for computer interface - Google Patents

Abstract

DEVICE FOR PAIRING; with a computer containing the first register, the information input of which is the input information bus .. of the device, the input synchronization slot and the control of which is connected to the input of the control unit, the output to the water / output of the connected 6: output. Recording 1 - with an automatic input), the first input of the first register, diaphragm, the input of which is connected to the output of the first register, and the output - to the information input of the second register, switch, the outputs of the first group of which are outputs of the device I, and This is due to the fact that, in order to expand its area of application by interfacing with the computer inputs and outputs of peripheral nodes and simplifying the circuit, a third register and an analog multiplexer are introduced into it, with the information input of the Third Register connected to the output of the second, and the output with the switch input, the outputs of the second group of which are connected to the information inputs of the analog multiplexer whose output is connected to the information input of the comparators block whose output is connected to the computer information input bus, and input inputs - to the output of the first register, strobe input of the comparator unit is connected to the input / output of the control unit, output Record 3 of which is connected to the control input of the third D register ..: п о CD СП

Description

The invention relates to automation and computer technology and to be used for interfacing with a computer in controlling the operation of digital electronic circuits. .

A device for interfacing is known, which contains a control computer, two registers, a reading unit, a switch, a control unit and a control object l.

This device is limited in scope because it does not provide for the control of logic circuits with faults caused by an intermediate level of voltage (between logic zero and logic unit) at the output.

The closest in technical essence to the invention is a computer interface device comprising a first register, the information input of which is an input information bus of the device, and the control bus is fed to the control unit, the first output of which is connected to the first input of the second register, and the second output is fed to the second input of the first register and to the first input of the readout unit, the decoder, the input of which is connected to the output of the first register, and the output is fed to the second input of the readout unit and the second input of the second register and whose output is connected through a switch to the object control block comparators whose .The inputs connected to the output switch, and an output supplied to the third input of the read unit, an output connected to an information output device 2J bus.

The disadvantages of the known device are limited scope and complexity.

The aim of the invention is to expand the field of application of the device due to interface with the computer inputs and outputs of the periphery and simplify the scheme.

This goal is achieved. A device for interfacing with a computer that contains the first register, whose information input is the input information bus of the device, whose input synchronization and control bus is connected to the input of the control unit, the I / O output is connected to the control input of the second register, and the output Record 1 is connected to the control input of the first register-, encoder, whose input is connected to the output of the first register, and the output - to the information input of the register, switch, outputs groups which are vyodami device introduced Registers and third analog multiplexer.

the information input of the third register is connected to the output of the second register, and the output is connected to the input of a switch, the outputs of the second group of which are connected to the information inputs of an analog multiplexer, the output of which is connected to the information input of the comparators block whose output is connected to the input information bus of the computer, and address inputs - to the output of the first register, the strobe input of the comparators unit is connected to the I / O output of the control unit, the output of which Record 3 is connected to the control input of the third register .

On the fit. 1 shows a block diagram of the device} in FIG. 2 is a diagram of the switch in FIG. 3 is a block diagram of the control unit J in FIG. 4 is a block diagram of comparators.

The device contains a control computer 1, a control block 2, a first register 3, a decoder 4, a second register 5, a comparators block b, a third register 7, an analog multiplexer 8, a switch 9, an object 10 kontrol (peripheral device), which are repeated by group 11, information 12 and control 13 inputs, the second 14 and first 15 output groups of switch 9, will be added by the 5th decoder 16, trigger 17, control 18 and strobe 19 inputs of control block 2, information input 20, control input 21 of comparator block 6, comparators 22.1, 22.2, output 23 of block 6 omparatorov, ports 3 and C repeaters 11, the elements 24.1 and 24.2, the inverter 25.

The device works as follows.

COMPUTER. 1 through the control unit 2 initiates the process of transferring information from the computer to the second register 5 by setting a logical unit at the output of the I / O unit of the control 2. This signal allowed the recording of information in the second register 5 and prohibited the issuance of information, with the output of the block of comparators. After this, the command Writing 1 of the control unit 2 records in the first register 3 of the output word of the computer, which contains the bit code of the second register 5 and the code of the logical value of the signal recorded in this bit. After decoding, the logical value is written into the corresponding bit of the second register 5.

The second register 5 consists of two parts - control and test. Information that interprets each external contact of the control object is input or output is written into the control part, and the levels of stimulating effects for each of the input contacts are recorded into the test part. When in all bits of the second register 5 the information is received, the command of the control unit 2 is received. Record 3, according to which the contents of the second register 5 are copied in parallel into the third register 7. The third register has a structure that is angshogic to the second. At the same time, from the control part of the third register, the switch 9 supplies information connecting the test part of the third register to the input, and the analog multiplexer to the output contacts of the control object. Thus, it becomes possible to simultaneously stimulate stimuli at once through several contacts of the control object and, moreover, you can quickly change the output contacts of the control object to the input and vice versa. After the transfer of information from the second register 5 to the third register 7, t, e, after the next stimulus has been applied, the computer initiates, through the control unit, the mode of receiving information from the comparators b block by setting the zero logic level n I / O signal, which prohibits the reception of information in the second register 5 and allows the issuance of information from block 6 of the comparators. After this, the command of the control unit 2 Write 1 to the first register 3 records the contact code of the control object from which information is to be read, from the output of the first register 3 this to the address bus of the analog multiplexer 8, which switches the selected contact with the input of the b block of the comparators without changing the level of the signal present on it. The output signal level is analyzed in the comparators block, from the output of which the code of the signal being tested is fed to the input information bus of a computer. Thus, the output signal of the control object is estimated by level and its intermediate value can be interpreted as a control object malfunction. reading the output signal of the control object significantly reduces the amount of hardware of the comparator block 6, which in this case consists of one highly comparator level and one low level comparator with a sufficiently large number of output contacts of the control object, Gated repeaters 11, when applying a zero logic level to input C, switch to the high- and pedals state, and when fed to input C of a logical unit, pass the input signal NW to exit. Thus, by applying to the inputs 12 a test part of the contents of the third register, and inputs 13 are the control part of it, it is possible to quickly disconnect the output contacts of the control object connected to the comparator via the outputs of group 15 from the outputs of the third register. The analog multiplexer sends signals of all contacts of the control object to the outputs of group 14, which allows the device to self-monitor by reading the output of the third register into the computer. The bus 18 is fed to the input 18 of block 2. 3 and through the trigger 1 command - I / O, Input - one comparator is connected to the source of the reference voltage n; in equal to the lower value of the level of the logical unit, and input + another comparator - to the source of the reference voltage Eotah equal to the upper value of the log In other words, the inputs of both comparators are supplied with input information, the outputs of comparators through elements 24.1 - 24.2 are fed to the output code bus, and the other inputs of both elements I through inverter 25 are connected to control input 21. Input 20 provides information from the analog multiplexer output and is analyzed by a comparator. If the level of a logical unit arrives at the inputs of the comparators, then the output of one will be formed. logical unit, and the output of the other - a logical zero, if the inputs of the comparators receive the level of logical zero, then the output of the second comparator will form a logical unit, and the output of the first - logical zero. If an intermediate signal level has arrived, then logical units will be formed at the outputs of both comparators. Information from the outputs through the gated valves And is fed to the information bus of the computer,

Thus, the invention allows the operational control of the switch, the change of stimulating effects simultaneously on several input contacts of the control object. In addition, hardware costs are reduced by reducing the number of comparators. This allows the device to be used to interface with a computer in the control of digital circuits that have two-way lines and a more complex algorithm of operation, which significantly expands its scope.

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Claims (1)

154) A device for interfacing with a computer, comprising a first register, the information input of which is the input information bus of the device, the input synchronization and control bus of which is connected to the input of the control unit, output I / O of connected C; the control input of the second register, and the output, Record 1 - with the control input of the first register, a decoder whose input is connected to the output of the first register, and the output - with the information input of the second register, the switch, the outputs of the first group of which are outputs (devices, from And more importantly, in order to expand the scope of its application by interfacing with the computer inputs and outputs of peripheral nodes and simplifying the circuit, a third register and an analog multiplexer are introduced into it, and the information input of the Third register is connected is connected with the output of the second, and · the output with the input of the switch, the output of the second group of which is connected to the information inputs of the analog multiplexer, the output of which is connected to the information input of the comparator unit, the output of which is connected to the input information bus of the computer, and the address inputs are to the output of the first register, the gate input of the comparator unit is connected to the input / output of the control unit, the record 3 of which is connected to the control input of the third register.