SU1308926A1 - Device for measuring pulse repetition period - Google Patents

Abstract

The invention relates to a measurement technique and contributes to improving the reliability of operation and simplifying the device. The device contains the generator 1 pulses of the reference frequency, the element OR 2, the selectors 4 and 5, the counter 6 of the reference frequency and the counter 7 of the measured frequency. Introduced trigger 3 provides the formation of a dimensional interval. Moreover, the beginning of its formation, no matter at which point in time and period of the measured frequency the trigger signal will be given, will always coincide with the leading edge of the pulse of the measured frequency. 2 Il. Riga.1

Description

The invention relates to a measurement technique and can be used to measure the pulse frequency of arbitrary duration.

The purpose of the invention is to increase the reliability and simplify the device.

Figure 1 shows the block diagram of the device; Fig. 2 is a timing diagram explaining its operation.

A device for measuring the pulse frequency includes a pulse frequency generator 1 :, element OR 2, D-flip-flop 3, first and second selectors 4 and 5, counter 6 of the reference frequency, meter 7 of the measured frequency, start bus 8 and input bus 9.

“Element OR 2 is connected to the start bus 8 with its first input, and the second with the counter output 6 of the reference frequency, the output of the OR element 2 is connected to the D input of the D flip-flop 3, the C input of which is connected to the input bus 9 of the device and the second input of the first the selector 4, the inverse output of the D-flip-flop 3 is connected to the first inputs of the first 4 and second 5 selectors. The output of the generator 1 pulses of the reference frequency is connected to the second input of the second selector 5, the output of which is connected to the input of the counter 6 of the reference frequency and the input of the counter 7 of the measured frequency is connected to the output of the first selector 4.

The device works as follows.

In the initial state, the counters 6 and 7 are cleared (zero circuits are not shown), on the start bus 8 there is a logic level 1, which through the OR element 2 enters the D-INPUT of the trigger 3. The pulses of the measured frequency on the bus 9 (Fig. 2, a) arrive at the C-input of the D-flip-flop 3, set it to one state (the setting takes place on the leading edge of the measured frequency pulses, and each subsequent pulse confirms the state of the trigger). The level of Lo g-O from the inverse output of the D-flip-flop 3, entering the selectors 4, 5, closes them. The measurement starts after a logical level, O (Fig. 2, b), is applied to the start bus 8, via the OR 2 element, and the logical level, O, is also set to the D input of the E-D flip-flop 3.

five

0 o 5

five

On the front of the pulse of the measured frequency, the D-flip-flop 3 tilts to the zero state (Fig. 2c). The logic level 1 from the inverse output of the D-flip-flop 3, acting on the selectors 4 and 5, allows the passage of pulses, i.e. the formation of the measuring interval begins, and the beginning of its formation, no matter at which point in time of the period of the measured frequency, the trigger signal is given, always coincides with the leading edge of the pulse of the measured frequency. Subsequent pulses of the measured frequency only confirm the state of D-flip-flop 3. This continues until the output of counter 6 does not receive a signal with a logic level 1 (Fig.2, d), which through the OR 2 element enters D - trigger input 3. Similarly, on the leading edge of the pulse of the measured frequency, D-flip-flop 3 is tilted to the unit state (Fig. 2c). The logic level from the inverse output of the D-flip-flop 3 closes the selectors 4 and 5, and the measurement ends, the subsequent pulses of the measured frequency only confirm the single state of the D-flip-flop 3. As a result, the number of pulses of the measured frequency n is found in the counter 7, and counter 6 is the number of pulses N received from the generator 1 pulses of the reference frequency during the measurement time T,.

In the proposed device, the measurement time is always equal to the sum of the periods of the measured frequency recorded by the counter 7, i.e.

t 2- SP

measure t

The measurement time is N periods of the reference frequency recorded on the counter (divider) 6 frequencies, i.e.

G- (2)

eem

91

From relations (1) and (2) it follows that the measured frequency is equal to the ratio of the number of full periods of the measured frequency and their total duration, i.e.

 S

T

P . .:

Nt

(3)

At the same time, the beginning and the end of the formation of the measured time interval are always rigidly attached to the leading edges of the pulses of the measured frequency and do not depend on the pulse duration or on their period, i.e.; The measurement time is always a multiple of the pulse period of the frequency being measured.

Thus, the introduction of a D-trigger and new connections simplifies the device while retaining all its functionality.

Claims (1)

Invention Formula A device for measuring the frequency of following a pulse, containing the first and second selectors, a reference frequency counter, a measured frequency counter, a pulse generator of a reference frequency f5 and an OR element, the output of the reference frequency generator being connected to the second input second Editor O.Yurkovetska Compiled by T. Yagodkina Tehred A. Kravchuk Proofreader L. Pilipenko Order 1793/36 Circulation 731 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab, 4/5 Production and printing company, Uzhgorod, st. Project, 4 5 of the selector, the outputs of the first and second selectors are connected respectively to the counting inputs of the measured frequency counter and the reference frequency counter, the input bus of the device is connected to the second input of the first selector, characterized in that, in order to increase reliability and simplify the device, D is entered into it -the trigger, the D-input of which is connected to the output of the OR circuit, the first input of which is connected to the start-up bus, and the second one - to the output of the reference frequency counter, the C-input of the D-flip-flop connected to the input bus of the device, and the inverse output of the transducer igger is connected to the first inputs of the first and second selectors. ig. 2