SU1305672A1 - Device for calculating values of inverse trigonometric functions - Google Patents

Abstract

The invention relates to automation and computing and can be used in specialized computing devices. The goal: the invention is to expand the dynamic range of the argument. This goal is achieved by the fact that, along with four multipliers 3-6, subtractive counter 1, counter argument 2, counter result 9, the device contains an overflow counter B, a fifth multiplier 7, and the element OR 10. 1 Il. (L with 1- with About eaten sg IND

Description

1,130

The invention relates to automation and computing and can be used in specialized computing devices.

The purpose of the invention is to expand the dynamic range of the argument.

The drawing shows the instrumental circuit diagram of the prepaired device.

A device for calculating inverse trigonometric functions (FIG. 1) contains a subtracting counter 1, an argument counter 2, multipliers 3-7, an overflow counter 8, a reversible counter 9 for the result, and an OR element 10.

The device works as follows.

The pulses of the input sequence X are fed to the inputs of the counter 2 argument and the first multiplier 3. The increment of the pulses at the output of the multiplier 3 is determined by the expression

.u ,. -.

(one)

Integrating expressions (11) taking into account the limits of integration, in which ctx is the increment of impulses at the input

de multiplier 3; Z is the control number in counter 1; m, - the conversion factor of the counter lT Similarly, the increment of pulses at the output of the multiplier 4 is equal to

dy,

z.d-x.

2. - - -Sh2. output multiplier 5

z4 d-x

- ™ 3-cty,

(2)

(3)

The pulses from the output of the multiplier 5 are fed to the input of multipliers 6 and 7. The increment cLz pulses at the output of the multiplier 6

dz

 - 5l A2l

m

(four)

where is x

number in the counter 8.

The multiplier factor 7 is determined by the number of counter overflows.

The increment of the pulses dz at the output of the multiplier 7 is equal to

cizj KUz. . (five)

The increment cLz of the pulse sequence Z supplied to the clock input of the subtractive counter 1 from the output of the element OR 10 is determined by the sum of the increments dz and dz

dz

clz +

ctz

(6)

From equations (2) - (6) easy to semi (7)

the following: e dependencies

z

  ml-

 J .. .Z

dz - (+

m

4x)

(eight)

Further

,, 2 (KP} +. X)

Сь- Z - --ч; - - - -

tp m

(9)

The value of Ksh + x is numerically equal to the value of x, corresponding to the number of pulses received at the input of the device

 d-K K ha + X.

(ten)

Taking into account the expression (10), equation (9) can be hung

dz x

z - ;; 4 t

(eleven)

1 1 xH. m

(12).

or

m

(13)

Taking into account the expression (13), formula (7) takes the form r

cLy,

m

x + m

Oh.

(14)

40

The increment dy of the pulse sequence U2 from the output of the multiplier 4 is fed to the clock input of the reversible counter 9 result. When this counter operates in the summation mode, the number of y in it changes according to the law

Ug

t

m

cfx.

(15)

The solution to this equation is as follows:

u m-arctg -.

(sixteen)

If the result counter 9 is operating in the subtraction mode and the number 1 is entered into it before the start of the calculation.

Lo equal to m-t, the number y in that counter varies by law

X

II

 2

f sh

J X2. +

m

cix.

(17)

Solution of this equation

- but

 m (

У2..2 ™ -

in the proposed device, the range of 5 arguments is almost unlimited, since the algorithm of its operation takes into account the overflow of the argument counter

II

 - m-arctg - marcctg -. (19)

m

m

Claims (1)

Claims An apparatus for computing inverse trigonometric functions comprising four multipliers, a subtracting counter, an argument counter, a reversible result counter, an input of a device argument connected to a clock input of an argument counter and an input of a first multiplier of a first multiplier, the output of which is connected to the input of a first multiplier of a second multiplier, the output of which is connected to the input of the first multiplier of the third Editor N.Rogulich Order 1A52 / 46 Compiled by Z. Shershneva Tehred L. Oliynyk Corrector I. Muska Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgsy), Project Design st.,. four n 5 to 55 20 25 the multiplier and the clock input of the reversible counter of the result, the output of the third multiplier is connected to the input of the first multiplier of the fourth multiplier, the input of the second multiplier of which is connected to the output of the argument counter, the output of the subtracting counter is connected to the inputs of the second multipliers of the first, second and third multipliers, characterized in that in order to expand the dynamic range of the argument, an overflow counter, a fifth, a multiplier and an OR element are entered into it, the first and second inputs of which are connected respectively to the outputs of the fourth and fifth multipliers, the output of the OR element is connected to the clock input of the subtractive counter, the output of the third multiplier is connected to the input of the first multiplier of the fifth multiplier, the input of the second multiplier of which is connected to. overflow counter stroke, the input of which is connected to the overflow output of the argument counter.