SU1265806A1 - Function generator - Google Patents

Abstract

The invention relates to the field of analog computing and can be used as a non-linear unit in analog computing magazines or control systems of various objects. The aim of the invention is to understand the accuracy of the functional conversion of analog signals, which is achieved by introducing a third adder and a third multiplier. The second adder performs the summation of the output signals of the multipliers and the reference voltage with the corresponding weighting factors. Thus, the output signal of the converter is a rational fraction of the third degree, the torus allows to approximate a wide class of functions with high precision (L. 1, ill

Description

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The invention relates to analog computing and can be used as a non-linear unit in analog computers or control systems of various objects as a device for linearizing sensors or a device for preliminary processing of measurement information.

The aim of the invention is to improve the accuracy of the functional conversion of analog signals,

The drawing shows the functional diagram of the Converter.

The functional converter contains from the first to the third adders 1-3, from the first to the third multipliers 4-6, the input 7 of the converter, the pin 8 of the reference voltage and the output 9,

The Converter operates as follows.

The first functional unit includes an adder 1 and a multiplier 5, the inputs of which receive the input signal U of the converter and the output signal of the adder 1, the input voltage of which receives the reference voltage Uj, and the output signal of the multiplier 5 to the subtractor. Expressions for output the signals of adder 1 and multiplier 5, respectively, have the form

Uj ,,,, (- k1); Vs 2 Ux-Uj,

where kg, k, are weights

the summation over the summing and subtracting inputs of the adder 1, respectively;

k- - multiplier weighting factor 5.

Then the condition of dynamic equilibrium of the first functional node is

V - A 26, P, 8J 4; 0 V- -2i805 1 b x 1 .P2P-in-.nn. in-Y + v2

l, 020-10- -t-2,200- ICrx + x

,one

with a methodological error of SsO, 2%, while it is known when approximating this function has a methodological tolerance of 5 f), 8%, i.e.

265J () 62

Vch .. ...- k1) J

Solving this equation for Cn .. we find

 and -, .and

UI, MH., (., And,

The second functional unit is organized in the same way, consisting of adder 3 and multiplier 4 and implementing the dependence of the form

and bj-bi.yo ..,

 ,

where k-, k4 - weights

the summation by the sum of the usucheyu and subtractive inputs of the adder 3, respectively;

i multiplier weighting factor 4.

The third functional unit consists of multiplier 6, the output of which is

V-e-Uo-lx.

where kr is the weighting factor of the multiplier 6. Adder 2 performs the summation of the output signals of the multipliers 4-6 and the reference voltage with the corresponding weighting factors. Thus, the output signal of the proposed converter U

is a rational fraction of the third degree, which allows approximating a wide class of functions with higher accuracy than a rational fraction of the second degree. The proposed transducer with U | (and U / U (, y allows to reproduce the function

D b + bx + b x

which, in turn, allows, for example, approximation of the function of extraction of the root of the third degree

55 we have a fourfold increase in accuracy.

Superposition of two functions of the same variable

v. (1-1) hG

 .997, 039 J 0-jcj 2, A74in- + 2,924-10 x + x

, l

approximated with a methodological error of 8iO, 2%.

Claims (1)

Invention Formula A functional converter containing two. Multipliers and two adders; the first input of the first multiplier is the input of the converter; the first input of the second multiplier is connected to the output of the first i adder; the output of the second multiplier is connected to the first input of the second adder, connected to the reference voltage output - with output transforming tel. In order to ensure the accuracy of the functional transformation analog signals, it contains the third adder and the third multiplier, the first inputs of the first, third adders and the third multiplier are connected to the reference voltage bus, the second inputs of the second and third multipliers are connected to the first input of the first multiplier connected by the second input to the output of the third adder, the second input of which is connected to the output the first multiplier and the third input of the second adder connected by the fourth input to the output of the third multiplier.