SU1249535A2 - Device for performing spectrum analysis - Google Patents

Abstract

The invention relates to a measuring and computing technique, in particular, to devices for spectral analysis and the detection of signals against interference in the range of ultra-low-frequency radio waves. The purpose of the invention is to increase the accuracy of the spectral assessment. The goal is achieved by the fact that the device for spectral analysis consists of two blocks of discrete Fourier transform, seven switches, four registers, an arithmetic unit, an adder-reader, a group of registers, a accumulating adder, a comparator unit, two counters, a decoder and a constant block. memory with the corresponding connections. 8 il. (L C f S9 cl CA9 cl

Description

one

The invention relates to measuring and supervisory technology, in particular, to devices for spectral analysis and detection of signals against the background of noise j and ultra-low frequency radio waves.

The purpose of the invention is to increase the accuracy of the spectral uniform.

FIG. Figure 1 shows the block diagram of the device; in fig. 2 is a functional diagram of a device for performing Fourier transform; in fig. 3 is a diagram of a spectrum calculation unit; in fig. 4 is a diagram of the first is an arithmetic logic unit; in fig. 5 is a diagram of a spectrum calculator synchronizer; in fig. 6 is a block diagram for determining the parameters of an autoregression model; in fig. 7 is a diagram 20 of a second arithmetic logic unit; in fig. 8 is a diagram of the synchronizer of the block for determining the parameters of the autoregressive model.

The device contains a switch 1, 25 blocks 2 and 3 of the discrete Fourier transform, block 4 of the spectrum calculation and block 5 of determining the parameters of the autoregressive model.

The discrete Fourier transform unit (Fig. 2) contains transform blocks of the first kind, summing blocks 7, transform blocks of the second kind, and is a device of fast Fourier transform of dimension 2.

The spectrum calculation unit (FIG. 3) contains a switch 9, (input) registers. 10 and 11, an arithmetic logic unit 12 (ALB), a synchronizer 13 of a spectrum calculating unit, a register 14 (storing an intermediate result) and an accumulating adder 15.

Arithmetic logic unit 12 (Fig. 4) contains the switch 16 and the adder-subtractor 17.

The synchronizer 13 (Fig. 5) contains a counter 18 and a decoder 19.

The block 5 for determining the parameters of the autoregressive model (Fig. 6) contains (input) register 20, (input) switch 21, arithmetic logic unit 22, (input) switch 23, control block 24, group of registers 25, (output) switch 26 and block 27 comparison.

The arithmetic logic unit 22 (FIG. 7) consists of a switch 28 and an arithmetic unit about unit 29.

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The control unit 24 (Fig. 8) contains a counter 30 and a fixed memory unit 31.

The device works as follows.

N-point sequence X is input to the device.

X

35

one

 Vi

complex

about meanings

the signal under investigation, which is partitioned by 2 reports with an overlap of 2: 1, i.e. Shifts each time by 2 reports:

40

50

about 1

X,

N 1,. I

X and -1;

(one)

N-7 X

  N-1 0,. . . , 0.

A discrete Fourier transform V / (k) Dno {x, x ,, .. ,, x ,.} is performed on each of the sections;

(2)

U (U VPF {x ..- 1, ..., x., 0

Calculate x.Ck) V (k) V, (k) + (-1) v.

Computed

I

amount of

x (k) ,, (k),, 1,2

h-t

(k) j (3)

(four)

and produce the inverse discrete Fourier transform,,

R (m) ODno {x (k)},, 2, we get 2 first samples of the autocorrelation function of the signal under study.

By calculating the parameters of the first order autoregression model

a „-R (l) / R (0); (5)

(1- (a „| 2) R (0), (6)

I

eight.

Levinson's recursion is organized

km

g

"K.-ti: Q,. ,, ..

45

"To, -ak - ,,. Acc-ak-1, to-,

. (1 where a

lo

Q 1) 6

hkk-1

(7)

(eight)

(9)

- the reflection coefficient of the model of order K;

& - model prediction error.

The recursion stops when the

relative decreasing rate of error 6

ki prediction

55

pk

us,

models a

..Gb

less

one

b :.

with an increase of some magnitude)

N-point sequence X is input to the device.

X

one

 Vi

complex

about meanings

the signal under investigation, which is partitioned by 2 reports with an overlap of 2: 1, i.e. Shifts each time by 2 reports:

X and -1;

(one)

N-7 X

  N-1 0,. . . , 0.

A discrete Fourier transform V / (k) Dno {x, x ,, .. ,, x ,.} is performed on each of the sections;

(2)

U (U VPF {x ..- 1, ..., x

Calculate x.Ck) V (k) V, (k) + (-1) v.

Computed

I

amount of

x (k) ,, (k),, 1,2

h-t

and produce the inverse discrete Fourier transform,,

R (m) ODno {x (k)},, 2, we get 2 first samples of the autocorrelation function of the signal under study.

By calculating the parameters of the first order autoregression model

a „-R (l) / R (0); (5)

(1- (a „| 2) R (0), (6)

I

eight.

Levinson's recursion is organized

km

g

"K.-ti: Q,. ,, ..

(7)

45

"To, -ak - ,,. Acc-ak-1, to-,

(eight)

(1lot

Q 1) 6

hkk-1

(9)

where a

- the reflection coefficient of the model of order K;

& - model prediction error.

The recursion stops when the

relative decreasing rate of error 6

ki prediction

five

pk

us,

models a

..Gb

less

one

b :.

with an increase of some magnitude)

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which can be set equal, for example, from the outputs of block 2 and 3 to a corresponding value of 0.1. The input parameters are the automatic inputs of block 4, which are regressive spectrum estimation

Respectively, the first and second groups of inputs of the switch 9, which J in its initial state closes the first group of 2 inputs to 2 outputs of the switch 9.

are the parameters of the model selected

sort of

BUT

p - 1 p, p, pp

on which it is easy to build a continuous spectral estimate of the signal under study

G (f)

with

 R

(-eleven)

dir exp (-j2TTmAt) /

where fit is the sampling interval.

Using the proposed device as the output parameters of the autoregressive model coefficients, arriving at (1-2) information outputs of block 5, is more expedient than receiving reports of the spectral evaluation of the signal under study for the following reasons: if. g

honestly, the output parameters of Op, ap, ap, ..., apr are significantly less than the number of spectral estimation samples,

arriving at the outputs in a known device as a result of discrete Fourier transform, which creates additional convenience for their storage and further processing; in determining the spectrum of the signal under study, as a rule, several of its consecutive spectral estimates are obtained (the number of which can reach tens of thousands) and produce their statistical averaging. If the statistical averaging of the output parameters of the proposed device is exceeded, the number of which does not exceed 2, this will significantly reduce the hardware and time required to perform the statistical averaging operation.,

On the other hand, using as output parameters br,

P1 P7

a single impulse appears

h + 11

, app allows browsing-45 / o enters the (3-2) -and controlling

interesting parts of the spectrum

test signal with arbitrary

the input of block 12 and in switch 16 connects C () - () inputs to its (1-2) outputs. When this occurs, the operand, located in register 10 and arriving at the first group of inputs of the adder-subtractor 17, is multiplied by the operand written to registr 14, which through the switch 16 goes to the second group of inputs of the adder-reader 17. the falling edge of the pulse at the output 3 of block 13 results in the addition of the multiplication results in the adder 15 with its

step that can not be done using a known device.

In the initial state, the first 2 elements of the input signal are fed to the 2 inputs of block 2 from the output group of the comparator 1, and the first 2 to (2) elements of the input sample to the 2 inputs of block 3 from the output group of switch 1.

The results of the discrete Fourier transform do

- from the outputs of block 2 and 3 to the corresponding inputs of block 4, which are

15

25

20

thirty . j 9

Respectively, the first and second groups of inputs of the switch 9, which J in its initial state closes the first group of 2 inputs to 2 outputs of the switch 9.

The signal from the output of block 13, corresponding to the initial state j-f) of the counter 18 and a single signal at the output of the decoder 19, records information from the output of the switch 9 into the input register 11.

When the clock pulse arrives at the input of the counter 18, its state is increased by one, which leads to a change in the state of the decoder 19, and a single impulse appears at the efo output corresponding to the second output of the block 16, the leading edge through () - The second input of the switch 9 transfers it to the opposite state, while the information from the second group of 2 inputs goes to the output of the switch 9 and to the (32 +2) -th input of block 2. Over the operand V. (K) ( see expression (3), coming 1m to (1-2) inputs of adder-subtractor 17, and operand V ,, (K) (see raznya (3), which comes through; first 2 of its outputs, ac them on t (2 -ii)) inputs of adder-subtractor 17, the operation of addition-subtraction is performed according to 1 fusion (3), the result of which after the end of a single the pulse at output 2 of block 16 from outputs 1 - 2 of block 12 is written to register 14.

Thereafter, the next clock pulse, which increases its state by one, arrives at the clock input of the counter 18 of the block 13.

The output 3 of the decoder 19 and, respectively, the output 3 of the block 13

there is a single impulse that

h + 11

/ o enters the (3-2) -and managing

the input of the block 12 and in the switch 16 connects With () - () inputs to its (1-2) outputs. When this occurs, the operand in register 10 and arriving at the first group of inputs of the adder-subtractor 17 multiplies with the operand written to registr 14, which through the switch 16 goes to the second group of inputs of the adder-subtractor 17. the pulse front at output 3 of block 13, the multiplication results are multiplied in the adder 15 with its

contents and overwriting the contents of register 11 into the register 10.. After this, the counter 18 goes into the initial state and the described w-1k of operation

N block 4 is repeated (2 W) times,

after which, at (1-2) outputs, the sum- appears the 2-point estimate of the input signal spectrum, according to expressions (A).

After that, switch 1 goes to the state corresponding to the maximum value. When this occurs, the switching (N + 1) - (N + 2) of the inputs of switch 1, which are connected to the corresponding outputs of block 4, to the inputs of block 2. Thus, a point estimate of the spectrum of the signal under study is fed to (1-2) inputs of block 2. The result of performing the KpeTHqro Fourier transform (in this case, the 2-point estimate of the cyclic autocorrelation function of the input signal, the first 2 points of which carry information) by the Fourier transform unit 2 enters its outputs and, accordingly, 1-2 inputs of block 5, and is entered into the input register 20 on signal arriving at its (+1) -th input from the first output of block 24, which appears at output 1 of block 31 with a single state of counter 30.

The mode of recording information in register 20 corresponds to a control word and contains a unit in the first position with zero values of all the others.

The order of the control words at the output of block 31, and consequently, the execution of operations by block 5 is determined by the state of the counter 30, the output state of which is the address of block 31. For the control in the structure of the control word of block 31, the corresponding zones have been allocated The length of which is determined by the number of inputs or operations of each node.

The zones of the structure contain the addresses of the switched inputs of the switches 21 and 20, respectively, which are defined by the expression (7). In the area of the control structure are the addresses of operations necessary for calculating

but

kk

and compare according to the expression. . - J-, -, - - -.

neither m (7) - (10). In another zone there are output addresses and registers.

The ditch corresponds to the switch and the group of registers 25.

The following of control words from block 26-allows to operate with input operands and intermediate calculations and, in accordance with (7) - (9), calculate a. for an autoregressive K-order model. Based on the calculated prediction error 6, according to (10), the Z-relative velocity is computed, killing the model prediction error of order K by increasing it from (K-1) to K.

In comparison block 27, the parameter Z calculated in block 22 is compared, which through switch 23 arrives at the second input of block 27 with the value of constant 8, which arrives at the first input of block 27 from the () -th cell of block 25. If inequality (10) is satisfied , then the output of block 27, which is the control output 2 of the device, produces a single signal that blocks counter 30 and will indicate the end of the calculation process, and the () information outputs of block 5 show the result of calculating the parameters of the autoregressive m put on K-th dca.

If the condition (10) is not fulfilled at the output of the comparator block 27, there is no signal and the counter 30 continues to measure its state so that at the initial moment G1- (n + 1) its memory elements nullify and the single impulse is recorded in N- th item. In this case, the source address appears at the address inputs of block 31 and the described 1 SCSC calculation is repeated, the order of the model is increased by one, and its parameters are calculated.

Claims (1)

If the number of cycles performed reached (2 -1), which corresponds to the maximum possible order of the autoregressive model approximating the input signal, a signal indicating the end of the calculations and the values of & p, api, ap (,, 2, 3 ... P-1) on () the output result register groups will be the output data of the device. The invention The device for spectral analysis on the author. St. № 1084807, about t l and In order to increase accuracy, seven switches, a second discrete Fourier transform unit, four registers, a group of registers, a comparison unit, an arithmetic unit, a totalizer, an accumulator, two counters, a decoder and a memory block, the first output of the first switch is connected to the information input of the first discrete Fourier transform unit, the output of which is connected to the first information input of the second switch and the information input of the first regis tra, the outputs of which bits are connected to the corresponding information inputs of the third switch, the first and second outputs of which are connected respectively to the first information input of the fourth switch and the input of the first operand of the arithmetic unit, the output code of which is connected to the information input of the fifth switch, i th (, 2) output of which is connected to the information input of the i-ro register of the group, output j-ro (,) of the register of the group is the JM information output of the device and is connected to the j-th information input dy sixth switch, whose output is connected to second data input of the fourth commutators Pa. The output of which is connected to the input of the second operand of the arithmetic unit. The (2 + 1) -and output of the nth switch and the output of the group register are connected respectively to the first and second inputs of the comparison unit, the output of which is the output of the final calculation and connected to the setup input of the first counter, the information output of which is connected to the address input of the permanent memory unit, the first, second, third and fourth outputs of which are connected respectively to the clock input of the first register, control inputs 15 . Q 2 25 thirty five 0 five the third and fourth switches and the synchronization input of the arithmetic unit, the fifth output of the permanent memory unit is connected to the control input of the fifth switch and the clock inputs of the group registers, the sixth output of the permanent memory unit is connected to the control input of the sixth switch, and the seventh the output of the fixed memory unit is the control output of the device, the second output of the first switch is connected to the information input of the second discrete Fourier transform unit, the output of which is connected to the second information The second input of the second switch, the output of which is connected to the first information input of the seventh switch and the information input of the third register, the output of which is connected to the first input of the adder, the output of which is connected to the input of the subtractor and information input of the fourth register,: output which is connected to the second information input of the seventh switch, the output of which is connected to the second input of the adder-subtractor, the output of the accumulating adder is connected to the first information input in One of the first switch, the second information input of which is the information input of the device, the information output of the second counter is connected to the input of the decoder, the first output of which is connected to the clock input of the second register, the second output of the decoder is connected to the control inputs of the second switch and the totalizer, and clock input of the fourth register, the third output of the decoder is connected to the clock inputs of the third register and accumulating adder and the control input of the seventh switch, counting in the first and second counter moves are combined into the device's clock input, and the control input of the first switch is the device mode input. fig a (rig 5 (pU2.-1 W-; N W ShFCh in - 7 | ... 6 - 7 FIG. g FIG. 7