SU1244676A1 - Device for determining production rate of computer - Google Patents

Abstract

The invention relates to the field of computer technology and can be used to determine productivity in the operation and creation of a computer. The aim of the invention is to increase accuracy. The goal is achieved due to the fact that the address decoder, the AND element, the bus driver, the hyperbolic converter, the comparator, and the triggers are entered into the device. The measurement by the device is made taking into account the time for the execution of the utility program. IsD ij :: 4 ;; Odd

Description

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The invention relates to a computing technique and can be used to measure the performance of a computer.

The aim of the invention is to improve accuracy.

The drawing is a schematic of the device.

The device contains an address decoder 1, element 2, bus driver 3, triggers 4-6, key 7, comparator 8, key 9, integrator 10, recording unit 11, hyperbolic converter 12 containing an RC circuit with a resistor 13, a capacitor 14, one- 15 rational amplifier 15, multiplication unit 16, key 17. In addition, the drawing shows the input 18 of the reference voltage, the address input 19 of the device, the input 20 of the device record, 21 data of the device, the computer 22 under investigation, the address bus 23, the bus 24 data and e bus 25 records.

The device works as follows.

At the preparatory stage, a program was introduced into the computer under investigation along with the programs under study that control the operation of the device by means of commands to the Starting Position, Start and Stop.

The code for this program is 0 ... 01 on the bus 24 of the data of the computer under investigation corresponds to the signal The initial position of the device, code 0 ... 010 on the bus 24 of the data of the computer under investigation corresponds to the device Start signal, and the code O .., 0100 is on bus 24 data of the investigated computer - signal Stop the device. The control program performs a cyclical signaling of the initial position, start, and stop on an Issue (OUT) command, followed by issuing the device address to the address bus 23, a single signal,. on the bus 25 of the record and any of the above codes for the corresponding first, second and third bits of the bus 24 of the data of the computer. Time of service prog25

35

40

50

3Q

45

control frame, increased by the execution time of the command. The transition with the return of the investigated computer, determined at the preparatory stage, is fi and does not change subsequently, depending on the program under study. To measure the performance of the specified command Transition with the return of the control program

neither. the starting address of the program under study is set, for which the performance of the solution is determined. The known methods for measuring the performance of a computer are reduced to determining it in accordance with a formula representing a hyperbolic function:

one

where W is the performance of the computer;

t is the time of the test

computer programs.

TciK as a launch to the solution of the program under study is performed from the control utility program, after the Start signal is issued, and the measurement W occurs after the Stop command is issued to the device, then the execution time of the T1 utility program is included in the total solution time t and the solution performance of the researched nporif & Mi-ibi take the form

25

W

- T1

The total time t is always longer. the time of the service program f1 (t T1), so the device starts measuring the performance with a delay of T1.

We delay the moment of the beginning of measurement at the time T1 of the fulfillment of the service program, replacements for t T1 expression J

function W t. The moment of switching on the hyperbolic converter 12 is determined from the solution of the system of equations

performance w

on

W

one .-

The moment of the beginning of performance insertion t T2 (T2 const for the studied computer and control utility) is calculated as follows

T2

 B, {11G 2 4

1

Only a positive decision is taken into account, since T2 0.

The investigated program is launched on a solution from the control utility program, after the start of which

3

swarms a sequence of control codes appears on the tires of the computer under study 22. If the code on the address bus 23 of the computer under investigation 22 corresponds to the device address, then the address decoder 1 enters a single signal to the first input of the element 2. At the same time, when a single signal arrives from the bus 25 records of the investigated computer 22 receives a single signal at the second input 20 of the device (the second input of the element AND 2) and a level 1 is set on its code. The input to the control input of the bus driver 3, a single signal from the output of the element 2 2 It passes information from the bus 24 of the data of the investigated computer 22 connected via the third input 21 of the device to the data input. After the formation of a single signal, the initial position from the first output of the bus driver 3 enters the installation inputs of the flip-flops 4 and 6 and sets them to a single state. The device is ready to measure W. After

upon the command of the control program, a single Start signal is generated (code 0 ... 010 is transferred to the data bus 24, which, coming from the second output of the bus driver 3 to the setup input of the trigger 5, sets it to the single state. The signal from its direct output entering the control input of the switch 7 opens it. The key 17, the control input of which is connected to the inverse output of trigger 5, is closed. The reference voltage, corresponding to T2, from the input 18 of the device through the public key 7 goes to the input of the hyperbolic converter When the voltage at the output of the hyperbolic converter 12 becomes equal to the reference voltage, at time 2, the comparator 8 is triggered and the level 1 is set at its output. The signal from the output of the comparator 8 enters the trigger input four,

 sets it to the unit state. The signal .c of the inverse output of the trigger 4, arriving at the fault input of the trigger 5, sets it to the zero state. The signal from its inverse of the output opens the key 17, the key 7 is closed, thus to the input resistor 13 of the integrator hyperbolic transducer 12 is connected

44676

the output of the multiplication unit 16. From this moment on, the output of the hyperbolic converter 12 as a result of the realization of the differential equation for it, O forms a voltage realizing

N K. ;

K - -1- RC

where K is the transfer coefficient, taking into account the dimension j t, the execution time of the test

programs.

The value on the code of the hyperbolic transducer 12 and represents the productivity of the computer being investigated 22.

At the end of the execution of the program under study in computer 22, the control program returns to the control program, which generates a Stop signal: a single Stop signal appears at the third output of the bus driver, the 0 ... 0100 code on the data bus 24. This signal, arriving at the reset input of trigger 6, switches it to the zero state. The signal from its inverse x output goes to the control; key input 9. Key 9 is opened, and information from the output of hyperbolic converter 12 is stored on integrator 10 operating in tracking-storage mode. At block 11, the measured value of performance appears, the device is ready to measure W of the same program with new initial data or a new program.

Formula of invention

A device for determining the performance of a computer containing a hyperbolic transducer, keys, a registration unit, distinguished by the fact that, in order to improve accuracy, an integrator, triggers, a comparator, a shinner driver, an AND element, an address decoder, a device input are entered into it connected to the input of the address decoder, the output of which is connected to the first input of the element I, the second input of which is connected to the recording input of the device, the data input of which is connected to the information input of the bus driver, control the main input of which is connected to the output of the element I, the first output of the bus driver is connected to

the second output of the bus driver is connected to the installation input to 1 of the third trigger, the third output of the bus driver is connected to the installation input in O of the second trigger, the first input of the comparator is combined with the information input of the first switch and is connected to the input voltage of the device, the output of the third trigger is connected to the information input of a hyperbolic converter, the start input of which is connected to the inverse

I

Editor M. Tsitkina

Compiled by I.Kukhin Tehred M.Hodanich Proofreader S.Schekmar

Order 3919/52 Circulation 671 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

the input of the third trigger, the input of the installation of which is connected to the input of the first trigger, the input of the installation of which is connected to the comparator, the second input of which is connected to the information input of the third key and connected to the output of the hyperbolic converter, the inverse of the third the trigger is connected to the control input of the second key, the code of which is connected to the input of the integrator, the output of which is connected to the input of the registration unit.

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Claims (1)

Claim A device for determining the performance of a computer containing a hyperbolic converter, keys, a registration unit, distinguishing it with the fact that, in order to improve accuracy, an integrator, triggers, a comparator, a bus driver, an I element, an address decoder, the address input of the device are connected with the input of the address decoder, the output of which is connected to the first input of the And element, the second input of which is connected to the recording input of the device, the data input of which is connected to the information input of the bus driver, which controls the input for which it is connected to the output of the And element, the first output of the bus driver is connected to the installation input of 1 of the first and second triggers, the second output of the bus driver is connected to the installation input of 1 of the third trigger, the third output of the bus driver is connected to the installation input of О of the second trigger, the first the comparator input is combined with the information input of the first key and connected to the input of the reference voltage of the device, direct 1 output of the third trigger is connected to the information input of the hyperbolic converter, the input is the start of which is connected to the inverse input of the third trigger, the installation input to О which is connected to the inverse output of the first trigger, the installation input to О which is connected to the output of the comparator, the second input of which is combined with the information input of the second key and connected to the output of the hyperbolic converter, inverse the output of the third O trigger is connected to the control input of the second key, the code of which is connected to the input of the integrator, the code of which is connected to the input of the registration unit.