SU1238151A1 - Device for regenerating information - Google Patents

Abstract

The invention relates to the field of computer technology, namely, devices for the regeneration of information, and can be used in dynamic memory devices. The invention makes it possible to increase the speed of dynamic storage devices by reducing the time allowed for the regeneration of information when the ambient temperature changes. The device contains a switch, a control unit, a counter, a trigger, a frequency divider, a synchronization unit, a temperature sensor, control inputs and outputs of the device. 1 il. ke oo 00

Description

The invention relates to computing technology, namely, devices for the regeneration of information, and can be used in dynamic storage devices. The purpose of the invention is to increase the speed of the device.

The drawing shows the block diagram of the device.

The device for information regeneration contains a switch 1, the outputs of which are the outputs of the device, the inputs of the first group are inputs 2 of the device, the control input is connected to the first output of the control unit 3, and the inputs of the second group are connected to the outputs of the counter 4, the input of which is connected to the first trigger input 5 and the output of the frequency divider 6, the inputs of which are connected to the outputs of the reversible counter 7, the output and the second input of the trigger are connected respectively: Eng: 0 to the first input and the second output of the control unit 3, the second input to (TopotT) is TC control input 8 device:; TWA, block 9 synchronization, the first 10;: О: 1 which And the first 11 output of the connection with the outputs of the temperature sensor 12, respectively, the second 13 and third 4 outputs of the synchronization unit are connected to the inputs of the reversible counter 7, the second 15 input of the synchronization blocks 9 are connected to one of the outputs of the counter 4.

The hermetic is also represented by a 16 emguls generator, the output of which is connected to the counting input of a divider 6 frequency, 11 (if) p 17 module number, the inputs of which are connected to the inputs 2 of the device, and a control input connected to the third output of the control unit 3 , drive 18. Osto pkhy from modules (chips) 19 memory (LSI) ..

R quality of the temperature sensor can be used, for example, LSI (micro Sms) memory ana. yugichnogo type with inco-iHifc; eM 8.

/ I .: 1 and a 1.1 and a special memory device - -; 0 p; 1b (this way).

;. C l paTfip; 16 g; are output with a period T pulse ;, which are then fed to the input of a programmable frequency divider 6. The latter reduces the frequency of fren-isy. fbcoB .depending on the code M in the reverse -fiBiiOM counter 7

M G, e „

B

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Obesiye - IESa exit time period tV .v T |.-и,: сс, equal to

where g the period of regeneration of the chip

d.chamychs memory; L is the number of rows in the storage matrix of the dynamic memory chip.

Unit 9 generates the command sampling signals (RAS, CAS, WE) of the temperature sensor 12 of the memory node. If the time period Treg / K at a given ambient temperature ensures the safety of the data in the storage site temperature sensor 12, then c. its information output (Do) is read "1", which leads to the arrival of a pulse from the second output 13 of block 9 to the input in the subtraction mode of the reversible counter 7 and a decrease in the M code and frequency fper.

0 If the time period Treg / K at a given ambient temperature does not ensure the storage of data in an additional memory chip, then DO reads “O” from its information output, which leads to the arrival of a pulse from the third

 output 14 of block 9 to the input in the mode of summing the reversible counter 7 and an increase in the M code and frequency. When this occurs, the block 9 is restarted in the recording mode “1B temperature sensor 12 (recovery of lost data).

From the output of the programmable frequency divider 6, the pulses go to us, the input of the regeneration trigger 5 is set to “1, and 4 inputs to the regeneration addresses are formed1; chip regeneration addresses

5 19 dynamic memory. After iterating through all the L regeneration addresses, the regeneration address counter 4 is set to " O and the cycle of iterating the regeneration addresses is repeated. In the regeneration mode, the device control unit 3 ensures the supply

0 through the address switch to the address inputs of the dynamic memory chip 19 of the regeneration addresses from the outputs of the counter 4 of the regeneration addresses, as well as the sampling signals to all groups of memory chips 9 at the same time, which ensures the overwriting of the data stored in them.

Upon receipt of the device access signals to the first control input 8 of the device, the control unit 3 ensures receipt from the address inputs 2

0 address devices through the switch i of addresses to the address inputs of memory chips 19 from a decoder of 17 clock signals — a sampling signal of a certain group of memory chips 19.

The technical and economic advantage of the device is that it provides faster information regeneration in dynamic memory.

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Claims (1)

Invention Formula A device for regenerating information containing a switch, the outputs of which are the outputs of the device, the inputs of the first group are the inputs of the device, the control input is connected to the first output of the control unit, and the inputs of the second group are connected to the outputs of the counter, the input of which is connected to the first input a trigger whose second input is connected to the second output of the control unit, the first input of which is connected to the trigger output, and the second input is the first control input of the device, characterized in that, in order to increase the speed of the device, it contains a frequency divider, a reversible counter, a synchronization unit and a temperature sensor, an input and the output of which is connected to the first output and the first input of the synchronization unit, respectively, the second input of the synchronization unit is connected to the first input of the trigger, the second and third outputs of the synchronization unit are connected to the first and torym down counter inputs respectively outputs down counter connected with the control inputs of the frequency divider, whose output is connected to counter input and sinh- rovhod frequency divider is a third control input of the device.