SU1236603A1 - Device for separating two pulse sequences - Google Patents

Abstract

The invention can be used in conjunction with devices that do not allow pulses at their inputs that are shifted in time by an amount less than t / f. where froax is the maximum frequency of the device, and can be used, for example, in pulse frequency discriminators, in input-libix devices for reversible counters. The purpose of the invention is to increase the speed of the device. The device contains a one-shot 1 delay, shaper 2 pulses, the element And 3, element OR 4, one-shot 5 delay, shaper 6 pulses, element And 7, element OR 8, input one-shot 9 and 10, D - triggers 11 and 12, elements And 13 , 14 and 15, elements OR 16 and 17, elements 18 and 19 of the delay. The increase in speed is achieved due to the introduction of delay elements 18 and 19 and elements OR 16 and 17, which ensure a performance gain of 1.5 times in comparison with the prototype, and the minimum permissible pulse period of the input sequence in the device should not be less than the duration of a single-pulse delay equal to 2. 1 Il. Q CL 1CHE SOUD ON ABOUT 00

Description

The invention relates to a pulse technique and can be used in conjunction with devices where the pulses that are not shifted in time by an amount less than G 1 / f, where the maximum frequency of operation of the device is not allowed to arrive at their inputs. For example, it may be applied in. pulse frequency discriminators, in input devices for reversible counters, etc.

The purpose of the invention is to increase speed.

The drawing shows a block diagram of the device.

A device for separating two pulse sequences contains serially connected lane: one delay one-shot 1, shaper 2 pulses, AND 3 and IL 4, and connected in series three-time delay one 5, shaper 6 pulses, I7 and element OR 8; the first and second input one-shot 9 and) O, the first and second D-flip-flops P and 12, the third, fourth and fifth elements AND 13-15, the third and fourth elements OR 16 and 17, the first and second elements 18 and 19 of the delay. The input of each input one-shot 9 and 10 is connected to the input of the corresponding one-shot 1 and 5 of the power supply and is the input of the device. The output of the first input one-shot 9 is connected with the input of the first D-trigger 11 and the D-input of the second D-trigger 12, the output of the second input one-shot 10c With the input of the second D-flip-flop 12, and the D-input of the first D-flip-flop 11, Q - the output of the first D-flip-flop 11 is connected to the first inputs of the fourth and fifth elements And 14 and 15, and its, the way - to the first input of the third element And

13 and to the second inputs of the first and second elements And 3 and 7. The Q-output of the second D-flip-flop 12 is connected to the second inputs of the third and fifth elements And 13 and 15, and its 0, output to the second input of the fourth element And

14 and with the third inputs of the first and second elements And 3 and 7. the first driver 2 pulses connected to the third inputs of the third

and the fifth elements And 13 and 5, and the output of the second shaper 6 them

o

five

0

five

5 3

0

55

thirty

0

pulses - to the third input of the fourth element And 14. The output of the third element And 13 is connected to the first input of the third element OR 16, to the second input of the first element 1SP 4 and to the input of the first delay element 18, the output of which is connected to the second input of the second element OR 8. The output of the fourth element AND 14 is connected to the first input of the fourth element OR} 7, to the third input of the second element SHY 8 and to the input of the second delay element 19, the output of which is connected to the third input of the first element OR 4. The output of the fifth element 15 is connected to the second the inputs of the third and fourth elements IfflH 16 and 17, and the outputs of the latter are connected to the B-inputs of the second and first D-flip-flops P and 12, respectively. The output1, 1 of the OR elements 4 and 8 are the outputs of the device.

The device works as follows.

The pulses of the first input sequence are fed to the inputs of the first one-shot one. 1 delay and the input one-shot 9, and the second sequence to the inputs of the second one-shot 5 delay and the input one-shot 10. The input one-shot 9 and 10 form pulses of duration t, one-shot 1 and 1 5 delays lasting 2T. The windrowers 2 and 6 pulses form from the back edges of the output pulses of the one-shot 1 and 5 delays short pulses coming in the first inputs of the And 3 to 7 elements and the third inputs of the And 13 and 14 elements. And the first pulse generator 2 is also fed to the third input of the second element and 15,

If the time shift between the correspondences; the pulses of the input sequences are greater than t, then the output pulses of the single-vibrators 9 and 10 do not overlap in time. D-triggers 11 and 12 at the moments of arrival on their C-inputs of the front-, their front edges of the input single-vibrators are set to Q O, B in the considered case at these moments on the D-input of each D-flip-flop 11 and 12 there is a level logical zero. Therefore, at the moment of arrival of the pulse of the first input one-shot 9 per

the second D flip-flop 11 is set to the Q O state, and at the time of the arrival of the second input pulse of the vibrator 10, the second B-trigger 12 is also set to the Q, 2 0 state. Logical zero levels from the Q outputs of the J-triggers II and 12 close the elements And 13 and 14 and the pulses with / outputs of the pulse shapers

2 and 6 do not pass to the outputs of the elements And 13 and 14. At the same time, the levels of the logical unit coming from the Q-outputs of the D-triggers 11 and 12 to the second and third inputs of the elements And

3 and 7, open them, and the pulses from the outputs of the formers 2 and 6 pulses through the elements 3 and 7 and the elements OR 4 and 8 pass to the outputs

devices. Thus, in this case, two pulses appear at the outputs of the device with the same time shift between them as with the two input pulses j, each of the output pulses is delayed relative to the corresponding input pulse by 2.

If the time shift between any two pulses of the input sequences is less than t, then the pulses of the input one-shot 9 and 10 overlap in time. Suppose that the pulse from the output of the first input one-shot one comes before the output of the second 10. This pulse goes to the C input of the first D-flip-flop 15, when its D-input does not yet have a pulse of the second input one-shot 10. So at The impulse effects of the first input single-shot 9 first D-flip-flop 11 are set to sostoy 0 (). At the moment of occurrence of a pulse at the output of the second input one-vibrator 10 at 1-input the second D-flip-flop 12 there is a logic one level, created by the pulse of the first input one-vibrator 9. Therefore, the second G-trigger 12 is set to the state Q 1.

(Q 0). The arrival of a pulse from the output of the second input one-shot 10 to the D input of the first D-flip-flop I1 does not change its state. The level of logical zero from the Q-output of the second 15-trigger 12 closes both elements And 3 and 7. The level of logical zero from the Q-output of the first -D - flip-flop 11 closes the fourth and

ten

15

20

five

0

five

five

0

366034

The five elements And 14 and 15. Of the five elements And open for the passage of pulses, only the third 13 will remain, at the first input of which there is a level of the logical unit from the Q output of the first D-flip-flop P, and at the second input - the level of the logical unit From the Q-Bounce of the second D-flip-flop 12, After a time of 2 T from the moment the input pulse arrives at the first one-shot 5 delays at the output of the first driver 2, a pulse appears that passes to the output of the third element 13. OR 4 passes on per- Bbr fi device output and simultaneously through the third element OR 16 to the B input of the second D trigger 12, resetting it to the initial state Q, O (Q 1). The same pulse arrives at the input of the first delay element 18, in which it is delayed by time t and through the second element OR 8 passes to the second output of the device. Thus, in the event that two input pulses with a time shift between them less than i arrive at the device inputs, of which the pulse arrives at the first input earlier, two delayed pulses appear at the device outputs with the same order but with a time shift between them equal to t. The first of the two output pulses is delayed relative to the corresponding input for the time 2G.

Since the device circuit is symmetrical, in the same way it is possible to consider its operation in the case when the impulse to the second input arrives earlier than the impulse to the first input. In this case, the device also restores the initial order of arrival of the input pulses, at the same time fixing the time shift between a pair of output pulses equal to t.

With full coincidence in time

impulses input one-shot WHO

It is possible to randomly install both D - flip-flops 1Г and 12, to the state QQ, p 1, First, second, third and Fourth elements OF, 7, 13 and 14 5 are closed logical zero levels from the Q-outputs of D-triggers 1I and 12. At the same time, the logical unit levels from the Q-outputs I) of the flip-flops P and 12 open the fifth element I 15, The pulses from the outputs of the formers 2 and 6 pulses do not pass to the outputs of the first 3, second 7, third 13 and fourth 14 elements The pulse from the output of the first pulse former through the open fifth element And 15 and the third 16 and the fourth 17 elements. s or provided to the B inputs of D -triggerov 11 and 12, setting them to their original state Q Q, 0. Thus, completely coinciding in time input pulses are eliminated from the output sequences.

The proposed device has a higher speed compared with the known. This is due to the fact that the first pulse of the output pair, in the case when the time shift between the pair of input pulses is less than t, is generated at the moment of arrival of the pulse from the output of the pulse former, which is separated from the corresponding input pulse by 2T. The pulse at the output of the pulse shaper is generated from. the trailing edge of a one-shot pulse with a delay of 2i, Therefore, after time 21 (in the limiting case), the next input pulse that again starts the same delay one-shot is allowed to enter the same device input. Therefore, the minimum permissible period of the pulse sequence of the input sequences in the proposed device should not be less than the pulse duration of the one-shot delay time equal to 2t:. 80t 2t (for prototype ST). Thus, the speed of the proposed device is more than the known. Extremely achievable value of winning in speed of 1.5 times.

Claims (1)

Invention Formula A device for the separation of two sequences of pulses, containing in series the first delay one-shot, pulse generator, AND element and OR element and in series VNIIPI Order 3098/58 Random polygons pr-tie, Uzhgorod, st. Project, 4 connected second delay one-shot, pulse generator, AND element and OR element, as well as the first and second one-one input, whose inputs are connected respectively to the inputs of the first and second delay single-shot, two D-triggers and the third, fourth and fifth elements And , while the output of the first input one-shot is connected to the C-input of the first D-trigger and to the D - input of the second D-trigger, and the output of the second input one-vibrator - to To the input of the second D trigger and to the D input of the first D flip-flop, the Q-trigger of which is connected to the first input of the fourth element AND, the Q-pilot - with the first input of the third element And, The Q-output of the second D-trigger is connected to the second input of the third element I, and the Q-output to the second input of the fourth element I, which means that, in order to increase its speed, the first and second delay elements are introduced, as well as the third and fourth OR elements, and the Q-output of the first D-flip-flop is connected to the second, and The Q-output of the second D-flip-flop is with three; the inputs of the first and second components are And, the outputs of the first and second pulse shapers are connected to the third inputs of the third and fourth And elements, respectively; the output of the third And element is connected to the first input of the third element OR, with the second input of the first element OR through the first element delays with the second input of the second element OR, the output of the fourth element AND is connected to the first input of the fourth element OR, to the third input of the second element OR and through the second delay element to the third input of the first OR element, and the Q inputs of the first and second D triggers are connected respectively to the first and second inputs of the fifth AND element, the third input of which is connected to the output of the first pulse driver, and the output is connected to the second inputs of the third and the fourth element OR whose outputs connected to the R-inputs, respectively, of the second and first 1-triggers. Rage 816 Subscription