SU1231479A1 - Method of testing logical microcircuits - Google Patents

Description

The invention relates to instrumentation technology and can be used to control the operation of logic chips made on one or more elements 2I-NO, ZI-NO, 4I-NO,

The purpose of the invention is to reduce the time of control and expand the functionality of the method.

FIG. 1 at feena controlled logic chip} in fig. 2 is a timing diagram explaining the method.

FIG. 1 marked the first 1, second 2, third 3 and fourth: 4 inputs, the first 5 and second 6 outputs of the controlled logic chip 7, containing the first 8 and second 9 elements 2I-NOT.

FIG. 2, 1, 2, 3, 4, 10 and 11 time diagrams of voltage pulses are forcibly assigned to the corresponding pins 1-6 of a controlled logic chip from an external source of pulses, 5 and 6 are adjustable, and time diagrams at outputs 5 and b of a controlled logical microcircuits 7, V is the duration of a negative pulse and, - the level of logical zero at the outputs 5 and 6 of the controlled logic microcircuit 7.

The essence of the method is as follows.

It is assumed that before the start of control the type of chip 7 and the logic function performed by it is unknown, i.e. microcircuit 7 can contain any number of logical elements, each of which can perform any logical function from a set of 2I-NO, ZI-NO, 4I-NO, 8I-NO. The task of control is to establish the type of chip 7j the logic function performed by it and the suitability or unsuitability of the chip 7.

In order to control the chip 7, one sets in turn (in any time sequence other than that shown in Fig. 2, negative voltage pulses on all the outputs of chip 7, regardless of their purpose, i.e., all its inputs and outputs, because negative the pulse can then be applied to the output of chip 7, which is in a state of logical zero with a level of U, to prevent

0

five

0

.five

0

No output of the microcircuit out of operation limits the duration t of the negative pulse to the value permissible according to the specifications on the microcircuit.

Negative pulses to pins 1-6 of microcircuit 7 are set in compulsory order from an external source of pulsed voltage in accordance with timing diagrams 1, 2, 3, 4, 10, and 11 in FIG. 2

In case the microcircuit 7 is valid, when setting a negative voltage pulse with a duration of c (Fig. 2) to the output of the microcircuit 7, which is an input, for example, to input 1 or input 2, or input 3, or input 4 , at the output, which is an output, for example, at output 5 or output 6, a positive pulse of duration i is formed. Consequently, the occurrence of at least one positive pulse on this output of the chip can be determined that it is upstream. Summing up the number of pins of the microcircuit, on each of which at least one positive pulse of voltage of duration 1, finds the total number of codes (pts) of the microcircuit. Since the negative pulse on one of the inputs 1-4 of chip 7 necessarily corresponds to a positive voltage pulse on one of the chip codes, counting the total number of positive pulses generated on all the outputs of chip 7 determine the number of inputs (n)

PX

microcircuits 7. For the example shown in FIG. 1 and FIG. 2, the total number of detected positive pulses is equal to Pc 4 and equal to the total number of inputs of the microcircuit 7, positive impulses: appear on two pins 5 and 6 of the microcircuit 7, hence the number of its outputs n

ftblX

 2. Compare the obtained numbers of p 4 and p. 2 with the values of the combinations n „„ and n for the chipset in question;

 i.e., the optics divide the type of microcircuit, and therefore the logic function performed, by coincidence, and consider the microcircuit 7 to be valid.

If chip 7 is bad 55, for example, failed one at a time

from the inputs I.PI of the outputs, then the obtained values of n or Pd, do not coincide with any of the given for consideration3 -, 1

chipset and chip 7 is considered unusable.

Thus, due to an arbitrary sequence of setting negative pulses on all pins of chip 7, regardless of their purpose, detecting positive pulses on all pins of chip 7, counting the number of such pins and finding the total number of positive pulses generated in one cycle of checking, The method provides the ability to control types of microcircuits with an unknown in advance arrangement of inputs and outputs, in which the same output can be an input or an output, provides the ability to determine or logic function implemented by logical elements of the chip, where to finding the body in a few chips of the same type of conical elements from a set of 2I-NOT-NOT GI, 4I, 8I NOT-NOT. .

The proposed method controls all the logical elements of the controlled logic chip at the same time and does not require the operation to switch from testing a single logical element to checking another logical element, therefore, it is faster than by a known method

Claims (1)

Invention Formula The way to control logic chips, including sequential 794 over time, the supply of negative voltage pulses of duration t to the logic terminals, which are the inputs of a controlled logic chip, characterized in that, in order to reduce the monitoring time and expand the functionality of the method, voltage t pulses alternately and once for all the controlled chip, regardless of their purpose, find the number of outputs of the controlled logical chip by the number of its logical conclusions, on which at least least one positive voltage pulse of duration L, the number of inputs m Nachod controlled logic circuits, determines the total number of positive voltage pulses of duration T on of all logic. comparing the obtained value of the number, inputs and outputs with the values of the number of inputs and outputs specified for determining certain types of controlled logic chips, consider the control chip valid if the obtained value of the numbers of inputs and outputs match one of the specified ones, and the logical function of the controlled logic chip is determined to be matched with the given one, in case of a discrepancy between the obtained value of the numbers of inputs and outputs with one of the specified readings Controlled logic chip is unusable. ten ITLM. Editor I.Se.gl nickname Compiled by V.Dvorkin Tehred L.Oleinik Order 2562/51 Circulation 728 Subscription VNIIPI USSR State Committee. for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab ,, d, 4/5 Production and printing company, Uzhgorod, Projecto st., 4 Proofreader A. Obruchar