SU1218363A1 - Device for supplying corrections of time signals - Google Patents

Abstract

The invention relates to radio engineering and can be used in the construction of high-precision synchronizing devices and time keepers in navigation and communication systems. The purpose of the invention is to improve the accuracy of introducing corrections of time signals. The device contains a reference generator I, a generator of linearly varying voltage (GGOSH) 2, a voltage comparator (KN) 3, a pulse shaper (PI) 4, a controlled frequency divider 5, the first and second elements And 6, 7, the first and second additional elements AND 8, 9, first and second RS-triggers 10, 11, element ШШ 12, element delay 11 13, counter 14, reversible counter 15 and converter code - voltage (GOSN) 16. Improvement of accuracy is achieved by introducing GLINE 2, KN 3, FI 4, the first and second elements And 8.9 and PKN 16. 1 Il. i §

Description

one

The invention relates to radio engineering and can be used in the construction of high-precision synchronizing devices and time keepers in navigation and communication systems.

The aim of the invention is to improve the accuracy of input of corrections for time signature signals.

. The drawing shows a structural electrical circuit of the device for entering corrections of time signals.

The device for entering corrections of time signals contains a reference generator 1, a generator of a linearly varying voltage 2, a voltage comparator 3, a pulse driver 4, a controlled frequency divider 5, the first and second elements And 6 and 7, the first and second additional elements And 8 and 9, the first and second RS triggers 10 and 11, the element OR 12, the delay element 13, the counter 14, the reversible counter 15, and the code-voltage converter 16.

The time correction device operates as follows.

Pulses from the output of the reference generator 1 start the generator of a linearly varying voltage 2, the output of which is fed to the first input of the comparator 3, to the second input of which voltage is supplied from the output of the code-voltage converter 16. At the time when the linearly varying voltage exceeds the voltage at the output of the converter 16, the comparator 3 switches to the opposite state, and the driver 4 generates a pulse, which flows through the first additional element And 8.

Thus, when the voltage level at the output of converter 16 changes, the instant of operation of comparator 3 changes, and consequently, the temporal position of the output pulse of the driver 4 relative to the trigger pulse from reference oscillator 1. The correction value in the digital additional code is recorded in counter 14. When a signal arrives Input a correction to the S input of the second RS flip-flop 11, it switches and opens or the first 183632

Ment 6 and the second element I 7, depending on the state of the first RS flip-flop, controlled by the signals of the sign of the correction, arriving at its inputs.

With a positive correction, the second element 7 and the next impulse from the output of the first additional element 8 through the delay element 13 are opened, the second element 7 arrives at the second input of the reversible counter 15 and increases its state by one. In this case, the output voltage of the transformer of the raiser 16. is increased by AU. The delay element 13 provides the necessary delay in the operation of the converter 16, eliminating the false triggering of the comparator 3

20 volt h

For proper operation, the delay value ig of delay element 13 must be selected as follows

yi-t

25

and

- max

where whether - the voltage of the converter is 16 code-voltage; - maximum swing

linearly varying voltage; T - period of the frequency reference

generator 1.

When increasing the voltage at the output of the converter 16 by di, and, consequently, the temporary position of the pulse at the output of the shaper 4, it changes by a plus relative to the trigger pulse from the reference generator 1, and the value of it is equal to

AU

and

t.

wax

45 This pulse through the first additional element And 8, the delay element 13 and the second element And 7 enters the reversible counter 15 and increases its state by

50 units, etc.

The cycle repeats until the reversible counter 15 accumulates the maximum number and the output 55 of the converter 16 sets a voltage equal to uU. In the next cycle, the reversible c4eT4Hk 15 switches to the zero state 3,

the voltage and the output of the converter 16 are set to a voltage equal to AU.

At the output of the P-transfer of the reversible counter 15, a transfer pulse is formed, which, through the second additional element I 9, goes to the second input of the first additional element I 8 and prohibits the passage of the next pulse from the output of the shaping device 4. with shaper 4, i.e. the input of the controlled frequency divider 5 receives a pulse shifted by the period of the input frequency of the reference oscillator 1.

The last cycle of device operation is repeated. The pulses from the output of the second element AND 7 also through the element OR 12 are delivered to the counting input of the counter 14, when overflowing which the output pulse returns the second RS flip-flop 11 to the initial state, the second element 7 and closes and the correction is stopped. The impulse to the counter 14 arrives every time when the reversible counter 15 is counted, i.e. counter 14 determines the number of entered samples.

A correction with the opposite sign is entered when the first element 6 and the second element 7 are closed, and 7, which is determined by the state of the first RS flip-flop 10.

In this case, the next pulse from the output of the first additional element AND 8 passes through the first element AND 6 to the first input of the reversible counter 15 and reduces its state by one. In this case, the voltage at the output of the converter 16 decreases by the value of Li, which corresponds to the shift of the temporal position of the output pulse relative to the triggering pulse from the reference generator I by the value of A to minus. The cycle is repeated until the zero state is established in the reversible counter 15. In the next cycle, the maximum number will be set on the reversible counter 15, and the code-voltage 16 will set a voltage equal to Tsdah and at the output of the converter code-16. In this case, the output pulse from the output of the driver 4 is not prohibited, since

183634

   .

from the exit. R of the first EZ-treigger 10 receives a signal at the second inlet of the second additional element And 9 and prohibits the passage of signal 5 from the output of the P-transfer of the reversible counter 15 and the second input of the first additional element And 8.

 The proposed device can be used in the exact time storage which is subject to high reliability requirements. .-.

Claims (1)

.J claims Correction device,, timej, containing a reference oscillator, controlled by a frequency divider whose input is combined 20 with the first input of the first element I directly, and with the first input of the second element I through the delay element, to the second inputs of the first and second elements I are connected, respectively, the direct and inverse outputs of the first RS flip-flop, the inputs of which are signals of the correction sign , to the third inputs of the first and second elements AND pod3Q is the direct output of the second RS-triIer, whose S input is the input of the Correction input signal, and the outputs of the first and second And elements are respectively connected to the first and second reversal inputs flow methods and via an OR - to the count input of the counter, you are a stroke which is connected to the R-input. A second RS flip-flop, characterized in that, in order to improve the accuracy of the input of time signal corrections, a series-connected linear voltage generator, a voltage comparator, a driver are introduced into it 5 pulses and the first additional element AND, to another input of which the output of the second additional element AND is connected, as well as the code-voltage converter, the output of which is connected to another input of the voltage comparator at the same time. the inputs of the converter are connected to the outputs of the corresponding bits of the reversible counter, the output of the P-period of which is connected to the first input of the second additional element AND, to the second input of which is connected and the 1 output 35 of the first RS flip-flop, and the output is the frequency of the first frequency, and the output of the reference rd additional element And the subregulator is connected to the input of the generator The key is connected to the input of a controlled, linearly varying voltage.