SU1195441A1 - Selector of pulses with respect to interval between them - Google Patents

Abstract

SELECTOR OF PULSES FOR INTERVAL MEVDU THEM, containing input bus, OR element, AND element, the output of which is connected to the output bus, the first input is connected to the device input bus, which is different in that, in order to expand functionality due to operational threshold control design and simplification, a current source, a capacitor, a switch, a first, second and third comparators, a differentiating circuit, an inverter and a feedback circuit, the first terminal of which is connected to the first condensate terminal, are additionally introduced into it. and with invertiruyu-. The first input of the first comparator, the non-inverting input of which is connected to the zero potential bus, and the output is connected to the second end of the feedback circuit and to the first input of the OR element, the second input of which is connected to a serially-connected differentiating circuit and inverter with the input busbar, and the output of the OR input. connected to the control input of the key, the output of which is connected to the second capacitor output, to the current source output, to the inverting input of the second comparator, to the non-inverting input of the third comparator, with than the non-inverting and inverting inputs of the second and third (L comparators are connected, respectively, C to operational buses with maximum and minimum transmission thresholds for selectable pulses, and the outputs of the second and third comparators are connected to the second and third inputs of the And, respectively; connected to the bus zero zero. Jill 4

Description

. one

The invention relates to a pulse technique and can be used in devices of discrete automation, measurement technology, control and remote control.

The purpose of the invention is the expansion of functionality through operational management (selection threshold and simplification).

The drawing shows a schematic diagram of the proposed pulse selector for the interval between them.

The pulse selector for the interval between them contains the element OR 1, the element AND 2, the output of which is connected to the output bus 3, the first input element AND 2 is connected to the input bus 4 current source 5 connected to the output of the capacitor 6 and the output of the normally open switch 7, the input of the OR element 1 connected to the output, the first input of which is connected to the output of the first comparator 8, and the output of the current source 5 is connected respectively to the inverting input of the second comparator 9 and the non-inverting input of the third comparator 10, and swarm input of the OR element is connected to the input bus 4 through a serially connected differentsir5 conductive circuit 11 and the inverter 12 at. In this connection, the feedback circuit 13 is connected between the inverting input and output of the first comparator, and the non-inverting and inverting inputs of the second and third comparators are connected respectively to the operating busbars 14 and 15 of the maximum and minimum selection thresholds of the selection pulses.

The device works as follows. in a way.

The operation of the pulse selector is considered from the moment the rear-front of the input pulse of positive polarity UB generated on the input bus 4 is formed.

At the trailing edge of the input pulse and ax, a pulse of positive polarity is formed at the output of the differentiating circuit 11, since the pulse arrives at the differentiating chain 11 through the inverter 12.

This impulse arrives at the input of the element OR 1, in connection with which the voltage of a positive polarity is generated at its input, which affects the control input

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Normally open key 7 causes the latter to be triggered, as a result of which the second lead of the capacitor 6 is closed via the normally open key 7 to the zero potential bus. This leads to the fact that at the first output of the precharged capacitor 6 a negative polarity voltage is formed, which is applied to the inverting input of the first comparator 8, which causes a positive polarity voltage to form at its output.

15 This voltage through the element OR 1 acts on the control input of the normally open key 7. In this case, the normally open key 7 remains in the closed state and

20 after the voltage from the output of the differentiating circuit 11 ceases to form.

For operation normally, open key 7 is not important front

25 The voltage input to its control input, and only the magnitude of the input pulse is important.

After the normally open key 7 is closed, the voltage at the inverting input of the second comparator 9 and the non-inverting input of the third comparator 10 will become close to zero, and since the control voltage has maximum and minimum thresholds

35 Uynp. Mwkc and Utspr. missions. is different from zero and it is of positive polarity, then a signal is set at the output of the second comparator 9, correspondingly. 1 (positive voltage

 polarity), and at the output of the third comparator 10 a signal is set to correspond.

Due to the fact that on one of the inputs of the element And 2 there is a signal equal to O, the voltage that can be generated on the input bus 4, for example, interference. The output element And 2 does not come.

50 Beginning from the moment of the formation of the trailing edge of the input pulse and the closing of the normally open switch 7, the capacitor 6 is discharged along the circuit: closed normally

55 Single key 7 - capacitor 6 feedback circuit 13 - output of the first comparator 8 - zero potential bus.

3.11

The discharge rate of the capacitor 6 is determined, in particular, by the magnitude of the resistance of the feedback circuit 13, which can be chosen to be small for the discharge current of the capacitor 6, for example, as shown in the drawing, by separately controlling the charge current and the discharge of the capacitor 6 , which can be done by sequentially turning on a diode with a resistor, which has a small resistance value.

The discharge time of the capacitor 6 is directly proportional to the magnitude of the voltage to which the capacitor 6 was charged.

At the moment of discharge of the capacitor 6, the current from the current source 5 closes, min capacitor 6, to the potential-zero bus through the closed switch 7 and therefore this current does not affect the discharge time of the capacitor 6.

At the moment when the discharge current of the capacitor 6 decreases to such a value that the voltage at the output of the first comparator 8 becomes close to zero, the voltage at the output of the first comparator 8 becomes close to zero and the normally open switch 7 opens. After the normally open key 7 is opened, the current from the current source 5 begins to charge the capacitor 6 through the resistance of the feedback circuit 13 to the output of the first comparator 8 and the zero potential bus.

In the proposed device, the voltage to which the capacitor 6 is discharged is a certain value, which is determined mainly by the magnitude of the resistance of the feedback circuit 13, and can be set by one, which is also an advantage of the proposed circuit, since the final value The discharge current of the capacitor 6 can be set to a large value (-more possible pickups), which eliminates the influence of pickups on the end time of the discharge of the capacitor, and consequently, contributes to an increase in the accuracy of selection .

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As the capacitor 6 is charged from the current of the source 5, the positive voltage at the second terminal of the capacitor 6 becomes larger.

5 When this voltage reaches the response value of the third comparator 10, and this can occur only after a time equal to the minimum value of the period selected

0 pulses, a voltage is generated at the output of the third compressor 10, corresponding to 1.

When the voltage across capacitor 6 reaches the response value of the second comparator 9, it can only be after the time corresponding to the maximum allowable period of the selected pulses, and it sets the voltage

20 Uupp D1 |, (, with the output of the second comparator 9 sets the voltage corresponding to O. In the time interval between the operation of the comparators 9 and 10 on

25 output element And 2 there are two logical units that allow the passage of the signal U on the output bus 3 (the element And 2 three inputs can be performed on the element And

30 to two inputs, which are supplied with voltage from comparators 9 and 10, the output of which is fed to the control input of a switch operating on the gatekeeper of the input bus Ugj {4 with the output bus 3 Ugj). If during the specified time interval a pulse Ug is generated on the input bus 4, it will pass to the output without distortion in duration, and if

.- on the element And 2 and the key, then in form.

In a time that differs from this interval of time, O will be present at one of the inputs of element 2, and the formation of an output signal at the output is impossible.

 At the trailing edge of the input pulse, capacitor 5 is zeroed and the time begins anew.

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Claims (1)

PULSE SELECTOR BY THE INTERVAL BETWEEN THEM, containing an input bus, an OR element, an AND element, the output of which is connected to the output bus, the first input is connected to the input bus of the device, characterized in that, · to expand functionality due to operational control of the selection threshold and simplifications, it additionally introduces a current source, capacitor, key, first, second and third comparators, a differentiating circuit, an inverter and a feedback circuit, the first terminal of which is connected to the first terminal of the capacitor and with and the inverting input of the first comparator, the non-inverting input of which is connected to the zero potential bus, and the output is connected to the second output of the feedback circuit and to the first input of the OR element, the second input of which is connected through a series-connected differentiating circuit and an inverter with the input bus, and the output ILI.soedinen element to control input keys, the output of which soedinen.s second terminal capacitor with a current source output, the inverting input of the second comparator with neinvertirukltsim input of the third comparator _with torus, the non-inverting and inverting ® inputs of the second and third comparators are connected respectively to the operational control buses with the maximum and minimum thresholds of transmission of the selectable pulse, and the outputs of the second and third comparators are connected respectively to the second and third inputs of the element And, and the key input is connected to Bus of zero Potential. SU _T , 1195441> ί