SU656203A1 - Multichannel voltage-to-code converter - Google Patents

Description

The invention relates to computing and can be used in digital control systems.

Multichannel voltage converters to code 1 are known, containing a channel switch with resistors connected in series at the inputs of its switches, connected at the input to a switch control unit, and output to a voltage converter into a code. The driver is connected to the synchronization unit, the code reading valve unit and the code comparison unit, which is connected to the constant driver. The latter is associated with a synchronization unit.

A disadvantage of the known multi-channel voltage-to-code converters is the inability to control the parameters of the channel switch keys (open circuit, short circuit and degradation care) without disconnecting the switch from the sources of convertible voltages while simultaneously controlling the converter (degradation and malfunctions).

In order to implement self-monitoring of the efficiency of the voltage converter into the code and to ensure automatic

monitoring the switches of the channel switches without disconnecting the switch from the source of convertible voltages into a multichannel voltage converter into a code that contains a channel switch with resistors connected in series on the signal inputs of its keys, the output of which is connected to the information input of the voltage converter into the code; the control unit of the switch, the first output of which is connected to the control inputs of the keys of the channel switch, the second output to the first input of the code comparison unit, and the input to the first output of the synchronization unit, the second output of which is connected to the starting input of the voltage converter to the code, g the third output of which is connected to the first input of the constant generator, and the fourth output to the BTOpbiNf input of the constant constants formatter, the second input of the code comparison block and the first input of the code reading valve block, the output of which is connected to hydrochloric output code, the second input -

0 with the output of the voltage converter into the code, and the third input with the output of the code comparison block, the third input of which is connected to the output of the constant generator, two registers are added, an adder-subtractor and two OR elements. The first inputs of the OR elements are connected to the output of the switch control unit, the outputs are connected to the control inputs of the keys of the corresponding control channels of the switch. The first inputs of the first register and equalizer and the second input of the second OR element are connected to the third output of the synchronization unit; the first input of the second register and the second input of the first element OR are connected to the first output of the synchronization unit. The first input of the second register and the second input of the first element OR are connected to the first output of the synchronization unit, the fourth output of which is connected to the second inputs of the first and second registers. The output of the voltage converter in the code. Is connected to the third inputs of the first and second registers and to the second input of the adder-subtractor, the third and fourth inputs of which are connected to the outputs of the first and second registers, respectively, and the first and second outputs of the adder-subtractor are connected respectively to the fourth input the first register and the fourth input of the code comparison block.

The structural electrical circuit of the proposed converter is shown in FIG. one; The timing diagram is in FIG. 2

The multi-channel voltage-to-code converter contains a switch of 1 channels, the output of which is connected to the input of the converter 2 voltage to the code, and the inputs are connected to resistors 3. The output of the converter 2 is connected to the second inputs of registers 4, 5 and the second input of block 6 of code reading gates , the third input of which is connected to the output of the code comparison block 7. The output of block 6 is connected to the output code bus 8, the outputs of synchronization block 9 are connected to the first input of the switch control unit 10, the second inputs of the OR, 12 elements, the starting input of the converter 2, the second inputs of registers 4, 5, the first input of the subtractor 13, the first input of block 6 of code reading gates and the first and second inputs of constants shaper 14. The first output of co-switch control unit 10 is connected to the input of switch 1 of channels, the first input of elements OR 11, 12, and the second output is connected to the first input of coding comparison unit 7 . The outputs of registers 4, 5 are connected to the fourth and third inputs of the adder-subtractor 13, the output of which is connected to the fourth input of the code comparison unit 7, the third input of which is connected to the output of the constants shaper 14. The output of the block 7 is connected to the third input of the code-reading valve 6 , the output of the adder-subtractor 13 - with the fourth input of the register 5, the outputs of the elements

OR 1U 12 - with control inputs of switches control channel keys 1.

The converter works as follows. The synchronization unit 9 generates pulses with a frequency of fo, f i, fs, s (cf. fig. 2). Pulses with frequency to start into converter 2, and pulses with frequency fi are sent to co-switch control unit 10 and provide switching on keys of input voltage of switch 1 of channels for 1 / fi time. Further, an impulse of frequency fi is fed to the input of the element OR 11 and. opens the control voltage key Ukch of the switch 1 channel, while the output of the switch with equal values of resistors 3 is a voltage equal to 1/2 (Ui + UM), where Ui is one of the input voltages with i 1, 2 , ..., p. This voltage is transformed by converter 2 into a code that is written to register 4. 0 A pulse with frequency fj arrives at the element OR 12 and opens the control voltage key Una com.mutator 1 of channels. In this case, a voltage equal to 1/2 (Ui + UKJ) appears at the switch output. This voltage is converted by converter 2 to code. The converter 2 starts up with a pulse of frequency fo, which is 3 times higher than any of the frequencies fi, fa, fj, the resulting code is written to register 5.

During the pulse, the frequency fj is equivalent to subtracting the contents of registers 4 and 5 on the calculator 13, and then comparing on block 7 the comparison of the codes of the resulting difference equal to 1/2 (UK, -UK) const, with a constant frequency arriving during the pulse f from constants 14.

If the switch voltage switch Ui is interrupted or has an unacceptably large pass resistance value, the value of the received code will differ from 0 constant value, and block 7 of code comparison will generate a prohibition signal for block 6 of code reading gates, prohibiting thereby issuing the code of this channel from converter

At the beginning of a pulse with frequency Gd, summation in the adder-subtractor of 13 values of the codes of registers 4 and 5 and the writing of a sum code, proportional to Ui + + l / 2 (Uiti-f UKJ), to register 5.

In case UK.) -UK, the value of code 0 in register 5 will be equal to Ui. At the time of the pulse of frequency f, the input voltage Ui is converted without load, the conversion code is written to register 4, the codes 4 and 5 are added to the subtractor 13, and the difference is compared with a constant received during the pulse 3 from the forward frequency constants 14.

If the difference between the contents of registers 4 and 5 at the end of a pulse with a frequency fs does not exceed a given constant, then a failure during the conversion did not occur and the result of the conversion through the block 6 of code reading gates is output to the output code bus 8. Otherwise, the issuance of the code is prohibited. Thus, all input voltages ui, Ua, ..., Un are transformed.

During the conversion of the control voltages UKI, Unj, the converter 2 and the switch of the channel switches are monitored for a short circuit type fault, since the conversion codes of the test voltages UR, UKJ will differ from those specified in the case of loading the test voltages via a permanently closed switch or failure of the converter 2 when detecting such a malfunction. The code comparison block 7 generates a prohibition signal for the code 6 gate of the code reading, which is held for a full conversion cycle. all channels.

Claims (1)

1. E. Gitis. Information converters for electronic computing devices. M., “Energie, 1970, p. 355-359. FIG. 2