SU1284000A2 - Synchroselector - Google Patents

Abstract

The invention relates to television technology. In relation to auth. No. 1197142, the object of the invention is achieved - to increase noise immunity. The sync selector contains a transition capacitor I, a comparator (K) 2, a differentiation unit 3, three switches 4, 5 and 11, a voltage divider 6 consisting of a capacitor 7 and two resistors 8 and 9, and a resistor 10. The goal is achieved by introducing a resistor 10 and a key 11, which ensures the confident entry of the sync selector into the established operation mode. This mode is characterized by the fact that the level of the damping pulse at the 1st input of K 2 is related to a zero potential, the reference voltage at the 2nd input of K 2 at this time is equal to half the magnitude of the sync pulse, and during the action. the clock pulse, the reference voltage at the 2nd input K 2 decreases. 2 Il. and s w

Description

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The invention relates to television technology and is complementary to the mainstream, y. No. 1197,142.

The purpose of the invention is to increase the anchoring rate.

Figure 1 shows the structural electrical circuit of the sync selector; figure 2 - timing diagrams.

The sync selector (Fig. 1) contains a transition capacitor I, com para 2, differentiation unit 3, first switch 4, second switch 5, voltage divider 6 containing capacitor 7 and resistors 8 and 9, resistor 10 and third switch 11.

The sync selector works as follows.

The full television signal after the transition capacitor 1 without a constant component (Fig. 2a) is supplied to the first input of the comparator 2. At the time of switching on the circuit (time t in Fig. 2), the voltage value on the I capacitor. 7 voltage divider 6 also , as well as at the second input of com para i, is zero (figure 2 & curve 1), and the voltage at the first input of comparator 2 increases and changes its polarity (figure 2 (curve 2). When it is life exceeds the threshold of the comparator 2, the latter is triggered and a positive is set at its output 2a. At the moments of operation of the comparator 2, the positive and negative edges of its output signal (Fig. 2 & g respectively) are detected at the first and second outputs of differentiation unit 3, controlling the operation of the first 4 and second 5 keys , the first key 4 is closed with positive edges, and the second key 5 - with negative differences of the output signal of the comparator 2.

At time t, the first key 4 is opened, ensuring in time

five

0 5

20 -30 -35

(FIG. 26) the charging of the capacitor 7 of the voltage U, to the point in time. , At the second input of comparator 2

before

t,

this sets the voltage

and approximately equal to half of the voltage on the capacitor 7. At time t, the comparator 2 triggers again, the second switch 5 connects the first input of the comparator 2 to the common bus, and the third switch 11 reduces the voltage at the second input of the comparator 2 to U values (Fig. 25). After several similar cycles, the sync selector switches to a steady state of operation at time tg, which is characterized by the fact that the level of the damping pulse at nej) —the input of comparator 2 is connected to zero potential; the reference voltage at the second input of comparator 2 at this time is half the span of the clock, and during the action of the clock pulse, the voltage at the second reference input of the comparator 2 decreases to the value U.

Thus, the introduction of the resistor 10 and the third key II ensures a confident entry into the steady state with a longer time divider 6 than the prototype, which contributes to an increase in the noise immunity of the sync selector

Claims (1)

Invention Formula Sync Selector Auth. No. 1197142, characterized in that, in order to increase noise immunity, a resistor and a third key are connected in series and connected between the common bus and the second comparator input, and the control input of the third key is connected to the comparator output. totf 6/5 WyV-./L rS Editor T. Mitejko Compiled by L. Stasenko Tehred A. Kravchuk Proofreader M.Samborsk .Z