SU1179534A1 - Travel encoder - Google Patents

Abstract

MOVING CONVERTER TO A CODE containing a code track and two sensitive elements located along it, shifted relative to each other by a quarter quantization step, characterized in that, in order to increase information reliability and expand the range of application of the converter, a clock pulse generator, six D, is introduced into it -triggers, EXCLUSIVE SHSH element, two NOT elements, decoder, clock generator output connected to the synchronous inputs of the first and second D-flip-flops and the input of the first inverter, output D which is connected to the synchronous inputs of the third and fourth D-flip-flops, the outputs of which are connected to the first and second inputs of the decoder, the outputs of which are the output of the converter, the outputs of the first and second sensing elements are connected to the information inputs of the first and second D-triggers, respectively, the outputs of which are connected to the information inputs of the fifth and sixth D-flip-flops respectively, the outputs of which are connected (L are, respectively, to the information inputs of the third and fourth D-flip-flops, the outputs of the fifth and the sixth D-flip-flops are connected to the third and fourth inputs of the decoder, the outputs of the first and second D-flip-flops are connected to the inputs of the EXCLUSIVE OR element, the output of which is connected to the synchronous input of the fifth D-trigger and the input of the second element is NOT, the output is obliquely connected to the information OP the entrance of the sixth D-flip-flop. 00 4

Description

one

The invention relates to automation and computing and can be used to convert a linear displacement or shaft angle into a pulse number code.

The aim of the invention is to increase information reliability and expand the field of application of the displacement transducer to the code. g

FIG. 1 is a block diagram of the proposed motion to code converter; 2, a state table of the decoder.

The converter contains the code track 1, sensitive elements (SE) 2 and 3, D-triggers 4-9, the element EXCLUSIVE OR 10, the decoder 11, the generator 12 clock pulses (GTI), the elements NOT 13 and 14.

The Converter operates as follows.

As the code track moves, 1 at the output of the sensing elements 2 and 3, rectangular impulses appear, shifted 1/4 of a period relative to each other. When the code track is moved in the forward direction, the pulse sequence at the output of the sensitive elements 2 is ahead of the pulse sequence at the output of the sensitive elements 3 by 1/4 of the period, and when moving in the opposite direction, it lags behind by 1/4 of the period.

In order to ensure reliable operation of the converter, the frequency of the clock pulses produced by the generator 12 must, at least four times, exceed the maximum frequency of the pulses at the outputs of SE 2 and

Consider the case when, when moving in the forward direction at the output of the sensing element, 3 log. Oh, and the output of the sensing element 2 appears log. 1 In this case, all the triggers are in the state log. ABOUT.

On the leading edge of the clock pulse, trigger 4 is set to the log state. 1, trigger 5 will remain in the log state. O and at the direct output of unit 10 in accordance with the Vits log. 1 on which the log. 1 from the output of the trigger 4 is rewritten to the trigger 6, and the output A of the decoder 11 is set to a log. 1 corresponding to the input combination of signals 0001.

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On the falling edge of the clock pulse log. 1 and log. About the outputs of the triggers 6 and 7 will be rewritten to the triggers 8 and 9, respectively, and the output 5 De A of the decoder 11 will be set

log O, corresponding to the input signal combination 0101, i.e. the formation of the output pulse corresponding to the displacement of the o-code track by 1/4 of the quantization step in the forward direction is completed.

With further movement of code track 1 in the forward direction, the state of the converter does not change until the appearance of the log. 1 at the output of the sensing element 3, which is written to the trigger on the leading edge of the clock pulse. At the output of the element HE, the 14th log shows. 1, on which the log. 1 from the output of the trigger 5 will be overwritten into the trigger 7. At the output A of the decoder 11, according to the Wits log. 1, recorded at address 0111. On the falling edge of the clock pulse log. 1 from the outputs of the triggers 6 and 7 will be rewritten to the triggers 8 and 9, respectively, and at the output of the decoder 11 in accordance with the Wits log. O, corresponding to the input combination of signals 1111, i.e. the formation of the output pulse corresponding to the movement of the code track by another 1/4 quantization step will complete.

With further movement of the code track in the forward direction, the state of the converter will not change until the log appears. About the output of the sensing element 2, which is on the leading edge of the clock

0 pulse is written in the trigger 4, at the output of the block 10 according to Wits log. 1, on which the log. About the output of the trigger 4 will be overwritten in the trigger 6, and the output A of the decoder 11 on Vits

5 log. 1, corresponding to the input combination of signals 1110. On the falling edge of the clock pulse, the log.O and the log. 1 from the outputs of the flip-flops 6 and 7 will be rewritten into the triggers 8 and 9, respectively, and the output A of the decoder 11 is logged. O, corresponding to the input combination of signals 1010, i.e. the formation of the output pulse is complete.

5 With further movement of the code track in the forward direction, the state of the converter does not change until the log appears. O at the exit

3,

the sensing element 3, which is recorded on the leading edge of the clock pulse in trigger 5. At the output of the element is NOT 14, the Wits log. 1, on which the log. About from the output of the trigger 5 will be rewritten to the trigger 7, and the output A of the block 11 by Wits log. 1 corresponding to the input combination of signals 1000. On the falling edge of the clock pulse, the log.O from the outputs of the flip-flops 6 and 7 will be overwritten into the flip-flops 8 and 9, respectively. At the output A of the decoder 11 Vits log. The corresponding input signal combination is 0000.

With further movement of the code track in the forward direction, the operation cycle of the converter is repeated.

If in this state of the converter the direction of movement of the code track is reversed, then at the output of the sensing element there is 3 log. 1 turns on earlier than at the output of the sensitive element 2. On the leading edge of the clock pulse, the trigger 5 is set to the state log. 1, the output of block 10 is set to a log. 1, according to which 795344

swarm log. About the output of trigger A will be rewritten to trigger 6. At outputs A and B of the decoder 11 will remain

log O, corresponding to the input 5 combination of signals 0000. On the trailing edge of the clock pulse, the triggers 8 and 9 will remain in the state log. O and the address at the input of block 11 does not change.

10 All transitions with further movement of code track 1 are similar to those described for the forward direction and occur in accordance with the table in FIG. 2, where 5 output states of the decoder are given with all possible input combinations for generating four, two or one output pulses in one quantum of movement.

A description of the converter operation is given for the case of the formation of four output pulses when the master system is shifted by one quantization step, however, this converter easily allows you to change the number of output pulses (4.2 or 1) per phase quantization by recoding the decoder 11.

(PUS. 2

Claims (1)

TRANSFER OF TRANSFER TO THE CODE containing a code track and two sensitive elements located along it, shifted relative to each other by a quarter of the quantization step, characterized in that, in order to increase the information reliability and expand the scope of the converter, a clock pulse generator, six D -triggers, an element EXCLUSIVE OR, two elements NOT, a decoder, the output of the clock generator is connected to the clock inputs of the first and second D-triggers and the input of the first inverter, the output to connected to the sync inputs of the third and fourth D-flip-flops, the outputs of which are connected to the first and second inputs of the decoder, the outputs of which are the output of the converter, the outputs of the first and second sensitive elements are connected to the information inputs of the first and second D-flip-flops, the outputs of which are connected to the information the inputs of the fifth and sixth § D-flip-flops respectively, the outputs of which are connected respectively to the information inputs of the third and fourth D-flip-flops, the outputs of the fifth and sixth D-tr the triggers are connected to the third and fourth inputs of the decoder, the outputs of the first and second D-triggers are connected to the inputs of the EXCLUSIVE OR element, the output of which is connected to the sync input of the fifth D-trigger and the input of the second element NOT, the output of which is connected to the information input of the sixth D-trigger. m s