SU1150642A1 - Device for displaying information on television indication device - Google Patents

Abstract

A DEVICE FOR DISPLAYING INFORMASHI ON THE TELEVISION INDICATOR, containing the first and second blocks of RAM, block of permanent memory, block of information exchange and block of synchronization, the first output of which is connected to the first input of the block of information exchange and the first input of the television indicator, the second input of which is connected , with the second output of the synchronization unit, the third output of which is connected to the second input of the information exchange unit. the third input and the first and second outputs of which are connected to the corresponding output and inputs of the first RAM unit, the fourth output of the synchronization unit is connected to one of the inputs of the permanent memory unit, the output of which is connected to the third input of the television indicator, characterized in that to increase device speed, it contains a write address counter, a read address counter, an address switch, a third RAM block, and a fourth RAM memory block whose input is connected to the third output of the information exchange unit, and (L output - with one of the inputs of the second and third blocks of RAM, the other input of each of which is connected to the first output of the address switch, the first and second inputs, the third input and the second output and the fourth input and the third the output of which is connected to the third and first outputs of the synchronization block, the input and output of the write address address counter, and the input and output of the read address counter, the output of the second, and the output of the third RAM memory block are connected to another input b flash nonvolatile memory.

Description

The invention relates to computing and can be used in the construction of raster-type display devices on television indicators. A device for displaying information on a television indicator, containing an operative memory block containing information about a displayed frame, a block of permanent memory, storage, graphic line-by-line analogs of the displayed information, a television indicator, and a synchronization unit Cl II are known. A disadvantage of this device is the need to interrupt the process of displaying information when reloading the contents of the regenerative blocks of the RAM of the display devices. Closest to the proposed technical entity is a device for displaying information on a television indicator, containing the first and second blocks of RAM, a block of permanent memory, a television indicator, an information exchange unit and a C2 J synchronization unit. The disadvantage of this device is low performance due to the fact that the display of one character string and the input of a new character string are performed sequentially. The purpose of the invention is to increase the speed of a device for displaying information on a television indicator. The goal is achieved by the fact that a device for displaying information on a television indicator, comprising first and second RAM blocks, a permanent memory unit, an information exchange unit and a synchronization unit, the first output of which is connected to the first input of the information exchange unit and the first the input of the television indicator, the second input of which is connected to the second output of the synchronization unit, the third output of which is connected to the second input of the communication unit, the third input and the first and second outputs of which With the corresponding output and inputs of the first RAM block, the fourth high voltage of the synchronization block is connected to one of the inputs of the constant memory block, the output of which is connected to the third input of the television indicator, contains a write address counter, a read address counter, an address switch, a third RAM block and a fourth RAM block whose input is connected to the third output of the information exchange unit, and an output to one of the inputs of the second and third RAM blocks, another input of each of which are connected to the first output of the address switch, the first and second inputs, the third input and the second output and the fourth input and the third output of which are connected respectively to the third and first outputs of the synchronization unit, the input and output of the write address counter and the input and output of the read address counter, the output of the second and the output of the third RAM block are connected to another input of the memory block. The drawing shows the functional diagram of the device. A device for displaying information on a television indicator contains a synchronization unit 1 comprising a generator of 2 clock pulses, a 3 point counter, a 4 line counter, a 5 character line counter and a frame synchronization counter 6, a first RAM block 7, an information exchange block 8 containing a read address counter 9, a request pulse driver 10 and an information reception and transmission register 11, a second RAM block 12, a write address counter 13, a fourth RAM block 14, an address switch 15, a constant block 16 second memory, the television display 17, a third operational unit 18 and the memory read address counter 19. A device for displaying indications on a television indicator works as follows. When turned on, the generator of 2 clock pulses of the synchronization unit 1 starts up, the master frequency of the entire device starts up, the 3 point counter starts working, counts points on familiarity, 4 lines counter, 5 character lines counter and 6 frame synchronization counter produce

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horizontal and frame synchronization pulses of the television indicator 17, as well as synchronization and control pulses for the remaining blocks. display devices

In particular, under; the action of these control signals, the information exchange unit 8 during the time of the horizontal line sweep generates the addresses of the polled cells on the counter 9 and the request pulses of the block 7 by means of the driver to, receives information from block 7 to the information receiving register t1 and rewrites it into the block 14. The number of calls to block 7 and, accordingly, the capacity of block 14 are determined by the number of characters to be placed in the string. The contents of block 14 are overwritten in blocks 12 or 18 during the horizontal flyback. First, the block 12 is filled. The block 12 is addressed when it is recorded by the proxy display of information through the write address counter 13.

When the block 12 is filled with the first character string by the address switch 15, the address inputs of the block 12 are switched to the outputs of the read address counter 19, and the contents of the block 12 are started to be read and displayed. At the same time, using the switch 15, the address inputs of the block 18 are connected to the outputs of the write address counter 13 and the second character string is recorded already in block 18. The filling of the block 18 proceeds in parallel with the output for display. information from block 12. After displaying the first row, blocks 12 and 18 using the switch

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15 are swapped — the read is from block 18, and the next character string is written to block 12. The indicated

5, the process is repeated until the end of the frame.

The presence of separate counters 13 and 19 of the write and read addresses is caused by the significant difference in

0 speed of these processes. The output to display from block 12 "or block 18 of information is fed to block 16 of the permanent memory, through which the formation of binary information

to the video signal. In essence, the incoming to block 16 is 12 or 18 and | "|) the format is the address code of the cells, in

Which Q are posted graphic analogs of the information displayed on the display. Moreover, this information represents only the best bits of the address code block 16, the younger

The 5 bits, the limit e in the Ie-Current line of the raster line, are transmitted from block 1 synchronizer and. At the output of the block

16, parallel code is serialized. This process is clocked by synchronization unit 1. The video signal received in this way comes

from block 16 to television indicator 17 and visualized by it under the control of lowercase and frame sync pulses, also coming from synchronization block 1.

Since the processes of displaying one character string and entering character data on the next character string are combined and go parallel; In effect, the speed of the predicted device is doubled.

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Claims (1)

DEVICE FOR DISPLAYING INFORMATION ON A TELEVISION INDICATOR, comprising first and second random access memory blocks, a permanent memory block, an information exchange unit and a synchronization unit, the first output of which is connected to the first input of the information exchange unit and the first input of the television indicator, the second input of which is connected. with the second output of the synchronization unit, the third output of which is connected to the second input of the information exchange unit, the third input and the first and second outputs of which are connected to the corresponding output and inputs of the first RAM unit, the fourth output of the synchronization unit is connected to one of the inputs of the permanent memory unit, output which is connected to the third input of the television indicator, characterized in that, in order to improve the performance of the device, it contains a write address counter, read address counter, address switch CA, the third RAM block and the fourth RAM block, the input of which is connected to the third output of the information exchange unit, and the output - with one of the inputs of the second and third RAM blocks, the other input of each of which is connected to the first output of the address switch, the first and the second inputs, the third input and the second output and the fourth input and third output of which are connected respectively to the third and first outputs of the synchronization unit, the input and output of the write address counter and the input and output of the read address counter od second and third output of memory blocks connected to the other input of the constant memory block.